GCSE Computer Science: Computer Architecture Revision Guide | GCSE 计算机：计算机体系结构考点精讲

📚 GCSE Computer Science: Computer Architecture Revision Guide | GCSE 计算机：计算机体系结构考点精讲

This article covers the fundamental concepts of computer architecture as required for the GCSE Computer Science syllabus. We break down the key components of a computer system, the fetch-decode-execute cycle, von Neumann architecture, and how data and instructions are processed. Each section contains essential definitions, common exam questions, and revision tips to help you master the topic.

本文全面梳理 GCSE 计算机科学大纲中计算机体系结构的核心考点。我们将拆解计算机系统的关键组件、取指-解码-执行周期、冯·诺依曼架构以及数据和指令的处理方式。每个小节包含基本定义、常见考题和复习提示，帮助你彻底掌握该主题。

1. The Central Processing Unit (CPU) | 中央处理器 (CPU)

The CPU is often called the ‘brain’ of the computer. It carries out instructions and processes data. It consists of several key parts: the control unit (CU), the arithmetic logic unit (ALU), and registers. The speed of a CPU is measured in Hertz (Hz), and its performance is affected by clock speed, number of cores, and cache size.

CPU 常被称为计算机的“大脑”。它执行指令并处理数据。CPU 由几个关键部分组成：控制单元 (CU)、算术逻辑单元 (ALU) 和寄存器。CPU 的速度以赫兹 (Hz) 为单位，其性能受时钟频率、核心数量和缓存大小的影响。

2. Von Neumann Architecture | 冯·诺依曼架构

The von Neumann architecture describes a system where both data and instructions are stored in the same memory. Programs are loaded into main memory (RAM) and executed sequentially. The key components are a central processing unit, memory, input/output devices, and a single bus that transfers data and instructions between them. This design is the basis for most modern computers.

冯·诺依曼架构描述了一种将数据和指令存储在同一内存中的系统。程序被加载到主存 (RAM) 中并按顺序执行。其关键组件包括中央处理器、存储器、输入/输出设备，以及在它们之间传输数据和指令的单一总线。这一设计是大多数现代计算机的基础。

3. Control Unit (CU) | 控制单元 (CU)

The Control Unit directs the operation of the processor. It fetches instructions from memory, decodes them to determine what operation is required, and then coordinates the execution of those instructions. The CU uses control signals to manage the flow of data between the CPU and other components. It does not process data itself but ensures the right data gets to the right place at the right time.

控制单元指挥处理器的操作。它从内存中取指令，解码指令以确定需要执行什么操作，然后协调这些指令的执行过程。CU 使用控制信号来管理 CPU 与其他部件之间的数据流。它本身不处理数据，但确保正确的数据在正确的时间到达正确的位置。

4. Arithmetic Logic Unit (ALU) | 算术逻辑单元 (ALU)

The ALU performs all arithmetic calculations (addition, subtraction, multiplication, division) and logical operations (AND, OR, NOT). It takes data from the registers, processes it according to the decoded instruction, and stores the result temporarily in the accumulator. The ALU is a fundamental part of the CPU and directly affects the computational power of the processor.

ALU 执行所有的算术计算（加、减、乘、除）和逻辑操作（与、或、非）。它从寄存器中获取数据，根据解码后的指令进行处理，并将结果暂时存储在累加器中。ALU 是 CPU 的基本组成部分，直接影响处理器的计算能力。

5. Registers and Their Roles | 寄存器及其作用

Registers are small, extremely fast memory locations within the CPU. Each register has a specific purpose: the Program Counter (PC) holds the address of the next instruction; the Memory Address Register (MAR) holds the address of the memory location to be accessed; the Memory Data Register (MDR) holds the data that has been read from or is to be written to memory; and the Current Instruction Register (CIR) holds the instruction currently being executed. The Accumulator (ACC) stores intermediate results from the ALU.

寄存器是 CPU 内部小型且极快的内存单元。每个寄存器都有特定用途：程序计数器 (PC) 存放下一条指令的地址；内存地址寄存器 (MAR) 存放待访问内存单元的地址；内存数据寄存器 (MDR) 存放刚从内存读取或即将写入内存的数据；当前指令寄存器 (CIR) 存放正在执行的指令。累加器 (ACC) 存储 ALU 的中间结果。

6. The Fetch-Decode-Execute Cycle | 取指-解码-执行周期

This cycle is the process by which the CPU processes instructions. In the Fetch stage, the address from the PC is copied to the MAR, then data from memory is brought into the MDR, and the instruction is copied to the CIR. The PC increments to point to the next instruction. In the Decode stage, the Control Unit interprets the instruction. In the Execute stage, the appropriate part of the CPU (e.g., ALU) carries out the instruction, and the result is stored in the accumulator or memory. This cycle repeats billions of times per second.

该周期是 CPU 处理指令的过程。在取指阶段，PC 中的地址被复制到 MAR，然后内存中的数据被送入 MDR，指令被复制到 CIR。PC 递增以指向下一条指令。在解码阶段，控制单元解释指令。在执行阶段，CPU 的相应部分（如 ALU）执行该指令，结果存储在累加器或内存中。这个周期每秒重复数十亿次。

7. Memory: RAM and ROM | 内存：RAM 和 ROM

RAM (Random Access Memory) is volatile memory that stores data and programs currently in use. Its contents are lost when power is turned off. ROM (Read Only Memory) is non-volatile and stores firmware, such as the boot instructions (BIOS). RAM allows reading and writing; ROM is typically read-only. Cache memory is a faster, smaller type of RAM that stores frequently accessed data and instructions to speed up processing.

RAM（随机存取存储器）是易失性存储器，存储当前正在使用的数据和程序。断电后内容丢失。ROM（只读存储器）是非易失性存储器，存储固件，如启动指令 (BIOS)。RAM 允许读写；ROM 通常只能读取。缓存是一种更快、更小的 RAM，存储频繁使用的数据和指令以加快处理速度。

8. Clock Speed and Cores | 时钟频率与核心

The clock speed, measured in gigahertz (GHz), indicates how many instruction cycles the CPU can perform per second. A higher clock speed generally means faster processing. Multiple cores allow parallel processing: a dual-core processor can handle two separate tasks simultaneously, improving multitasking performance. However, not all software can take advantage of multiple cores, so the benefit depends on the application.

时钟频率以千兆赫兹 (GHz) 为单位，表示 CPU 每秒可执行多少个指令周期。较高的时钟频率通常意味着更快的处理速度。多核心允许并行处理：双核处理器可以同时处理两个独立任务，提高多任务处理性能。但并非所有软件都能利用多核，因此优势取决于具体应用。

9. Buses: Data, Address, and Control | 总线：数据、地址和控制总线

Buses are sets of parallel wires that carry data, addresses, and control signals between the CPU, memory, and input/output devices. The Data Bus transfers actual data; its width (number of lines) determines how many bits can be transferred at once. The Address Bus carries the memory addresses; its width defines the maximum addressable memory. The Control Bus sends timing and control signals to coordinate activities.

总线是一组并行导线，在 CPU、内存和输入/输出设备之间传输数据、地址和控制信号。数据总线传输实际数据；其宽度（线数）决定一次可传输的位数。地址总线传递内存地址；其宽度决定了最大可寻址内存。控制总线发送定时和控制信号以协调各部件活动。

10. Embedded Systems | 嵌入式系统

An embedded system is a dedicated computer system designed for a specific function within a larger device. Examples include washing machines, traffic lights, and digital watches. Unlike general-purpose computers, embedded systems often have limited resources, low power consumption, and real-time operating constraints. They typically run firmware stored in ROM.

嵌入式系统是设计用于在更大设备内实现特定功能的专用计算机系统。例如洗衣机、交通灯和数字手表。与通用计算机不同，嵌入式系统通常资源有限、功耗低，并具有实时操作限制。它们通常运行存储在 ROM 中的固件。

11. Common Exam Pitfalls | 常见考试易错点

Many students confuse the roles of MAR and MDR: MAR holds an address, MDR holds data. Remember that the von Neumann bottleneck refers to the limited speed caused by sharing the same bus for data and instructions. When explaining the fetch-decode-execute cycle, always mention the registers involved and the sequence of transfers. Do not forget that RAM is volatile and ROM is non-volatile. Understand the difference between RAM and cache in terms of speed and capacity.

许多学生容易混淆 MAR 和 MDR 的角色：MAR 保存地址，MDR 保存数据。请记住，冯·诺依曼瓶颈是指由于数据和指令共用同一总线而导致速度受限。在解释取指-解码-执行周期时，一定要提到涉及的寄存器和传输顺序。不要忘记 RAM 是易失性的，ROM 是非易失性的。理解 RAM 和缓存在速度和容量上的区别。

12. Revision Summary and Quick Quiz | 复习总结与快速测验

To revise effectively, draw and label a diagram of the CPU showing CU, ALU, registers, and buses. Practise writing out the fetch-decode-execute cycle step by step. Test yourself: What is the function of the Program Counter? What is the difference between RAM and ROM? Why does increasing cache size improve performance? How does a dual-core processor handle two programs? Reviewing these questions will solidify your understanding and prepare you for the exam.

为了有效复习，绘制并标注 CPU 图，标出 CU、ALU、寄存器和总线。练习逐步写出取指-解码-执行周期。自我测试：程序计数器的功能是什么？RAM 和 ROM 的区别是什么？为什么增加缓存大小会提高性能？双核处理器如何处理两个程序？复习这些问题将巩固你的理解并为考试做好准备。

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Published by TutorHao | GCSE Computer Science Revision Series | aleveler.com

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