SQA Higher Computing Formula & Theorem Quick Reference | SQA 高级计算机：公式定理速查手册

📚 SQA Higher Computing Formula & Theorem Quick Reference | SQA 高级计算机：公式定理速查手册

Welcome to your essential quick-reference guide for the SQA Higher Computing Science course. This handbook covers the core formulas, logical theorems, and number representation rules you need for the exam. Each concept is presented with a clear English explanation followed by its Chinese translation to support bilingual learning and quick revision.

欢迎使用 SQA 高级计算机科学课程的必备速查手册。本手册涵盖考试所需的核心公式、逻辑定理和数字表示规则。每个概念均配有清晰的英文解释及中文翻译，助力双语学习与快速复习。

1. Boolean Algebra Laws | 布尔代数定律

Boolean algebra forms the backbone of digital logic design. The fundamental laws help in simplifying logic expressions. Understanding these laws allows you to reduce circuit complexity and improve efficiency.

布尔代数是数字逻辑设计的基础。基本定律有助于简化逻辑表达式。理解这些定律可以减少电路复杂性并提高效率。

The Commutative Law states that the order of variables does not affect the result for AND and OR: A AND B = B AND A, A OR B = B OR A.

交换律表明变量的顺序不影响与运算和或运算的结果：A 与 B = B 与 A，A 或 B = B 或 A。

The Associative Law allows regrouping of variables: (A AND B) AND C = A AND (B AND C), (A OR B) OR C = A OR (B OR C).

结合律允许变量重新分组：(A 与 B) 与 C = A 与 (B 与 C)，(A 或 B) 或 C = A 或 (B 或 C)。

The Distributive Law shows how AND distributes over OR, and vice versa: A AND (B OR C) = (A AND B) OR (A AND C); A OR (B AND C) = (A OR B) AND (A OR C).

分配律表明与运算对或运算的分配关系，反之亦然：A 与 (B 或 C) = (A 与 B) 或 (A 与 C)；A 或 (B 与 C) = (A 或 B) 与 (A 或 C)。

Identity, Annulment, and Complement laws are also fundamental: A AND 0 = 0, A OR 1 = 1, A AND NOT A = 0, A OR NOT A = 1.

同一律、零一律和互补律也很基本：A 与 0 = 0，A 或 1 = 1，A 与非A = 0，A 或非A = 1。

2. De Morgan’s Theorems | 德摩根定理

De Morgan’s Theorems are critical for converting logic gates and simplifying negated expressions. They describe how to distribute a negation over AND or OR operations.

德摩根定理对于转换逻辑门和简化取反表达式至关重要。它描述了如何将否定分布到与运算或或运算上。

Theorem 1: NOT (A AND B) = (NOT A) OR (NOT B). This means the complement of a conjunction is the disjunction of complements.

定理 1：非(A 与 B) = (非A) 或 (非B)。这意味着合取的补集是补集的析取。

Theorem 2: NOT (A OR B) = (NOT A) AND (NOT B). The complement of a disjunction equals the conjunction of complements.

定理 2：非(A 或 B) = (非A) 与 (非B)。析取的补集等于补集的合取。

In circuit design, applying De Morgan allows replacement of a NAND gate with an OR gate having inverted inputs, or a NOR gate with an AND gate with inverted inputs. This often reduces the number of IC packages needed.

在电路设计中，应用德摩根定律可以将与非门替换为输入反相的或门，或将或非门替换为输入反相的与门。这通常可以减少所需集成电路封装的数量。

3. Simplification using Karnaugh Maps | 卡诺图化简

Karnaugh Maps (K-maps) provide a visual method to minimise Boolean expressions. They are especially useful for up to 4 variables, grouping adjacent 1s into the largest possible power-of-two blocks.

卡诺图提供了一种可视化方法来最小化布尔表达式。它尤其适用于最多 4 个变量的情况，将相邻的 1 组合成尽可能大的 2 的幂次方块。

The sum-of-products expression is derived by covering all 1s with minimal prime implicants. Each group represents a product term where variables that change within the group are eliminated.

通过用最少的质蕴含项覆盖所有的 1，可以得到积之和表达式。每个组对应一个乘积项，组内发生变化的变量将被消除。

For a 2-variable K-map, the layout is a 2×2 grid; the cells correspond to minterms. Adjacency includes wrap-around: top cell is adjacent to bottom cell, left to right.

对于二变量卡诺图，布局为 2×2 网格，单元格对应最小项。相邻关系包括环绕：顶部单元格与底部单元格相邻，左侧与右侧相邻。

Example: F(A, B) = Σ(0, 1, 3) yields grouping of cells 0-1 and 1-3, giving simplified expression F = B’ + A (using SQA notation: NOT B OR A).

示例：F(A, B) = Σ(0, 1, 3) 将单元格 0-1 和 1-3 分组，得到简化表达式 F = B’ + A（SQA 记法：非B 或 A）。

4. Number Systems: Binary and Hexadecimal | 数制：二进制与十六进制

Computers use binary (base 2) internally. Hexadecimal (base 16) provides a more compact representation, with each hex digit corresponding to a 4-bit nibble.

计算机内部使用二进制（基数为 2）。十六进制（基数为 16）提供更紧凑的表示法，每个十六进制数字对应 4 位的半字节。

Conversion from binary to hex: group binary digits from the right into groups of 4, then convert each group to its hex equivalent (0–9, A–F). For example, 11011010₂ becomes DA₁₆ (1101→D, 1010→A).

二进制转十六进制：从右开始将二进制数字分成 4 位一组，然后将每组转换为对应的十六进制数字（0–9, A–F）。例如，11011010₂ 转换为 DA₁₆（1101→D，1010→A）。

Hexadecimal to binary: reverse the process; each hex digit expands into a 4-bit binary number. CAFE₁₆ becomes 1100 1010 1111 1110₂.

十六进制转二进制：逆向操作；每个十六进制数字展开为 4 位二进制数。CAFE₁₆ 转换为 1100 1010 1111 1110₂。

Denary (decimal) to binary conversion uses repeated division by 2, reading remainders from bottom to top. Binary fractions use negative powers of 2 (0.5, 0.25, 0.125…).

十进制转二进制使用反复除以 2 取余数的方法，从下往上读取余数。二进制小数使用 2 的负次幂（0.5, 0.25, 0.125…）。

5. Two’s Complement Representation | 二进制补码表示

Two’s complement is the standard method for representing signed integers in binary. It simplifies arithmetic operations as subtraction can be performed by adding the two’s complement of the subtrahend.

二进制补码是表示有符号整数的标准方法。它简化了算术运算，因为减法可以通过加上减数的补码来实现。

To find the two’s complement: invert all bits (one’s complement) and add 1. For an 8-bit representation, the range is –128 to +127. The most significant bit indicates sign (0 for positive, 1 for negative).

求二进制补码的方法：将所有位取反（反码）然后加 1。对于 8 位表示法，范围是 –128 到 +127。最高位指示符号（0 为正，1 为负）。

Example: +23 in 8-bit binary is 00010111. –23 is obtained by flipping bits to 11101000 and adding 1 → 11101001.

示例：+23 的 8 位二进制表示是 00010111。–23 通过将位取反得到 11101000，然后加 1 → 11101001 得到。

When adding two two’s complement numbers, any carry beyond the most significant bit is ignored. Overflow occurs if the result exceeds the representable range, detectable when adding two positive numbers yields a negative or vice versa.

当两个补码数相加时，超出最高位的进位被忽略。如果结果超出可表示的范围则发生溢出，当两个正数相加得到负数或两个负数相加得到正数时可以检测到。

6. Floating-Point Representation | 浮点数表示

Floating-point notation stores real numbers using a mantissa and an exponent, similar to scientific notation. Higher Computing typically uses a simplified model with a fixed total number of bits split between mantissa and exponent.

浮点记数法使用尾数和指数存储实数，类似于科学记数法。高级计算机课程通常使用一个简化模型，总位数固定，在尾数和指数之间分配。

A binary floating-point number is of the form mantissa × 2^exponent. The mantissa is a signed fixed-point fraction, and the exponent is a signed integer (often using two’s complement or excess representation).

一个二进制浮点数形式为尾数 × 2^指数。尾数是一个有符号定点小数，指数是一个有符号整数（常使用补码或偏移码表示）。

Normalisation ensures maximum precision by adjusting the mantissa so that the first bit after the sign bit is different from the sign bit itself. For a positive mantissa, it starts with 0.1…; for negative, it starts with 1.0…

规格化通过调整尾数确保最大精度，使得符号位之后的第一位与符号位本身不同。对于正尾数，以 0.1… 开始；对于负尾数，以 1.0… 开始。

Example: Using 8 bits for mantissa (with sign) and 4 bits for exponent (two’s complement), the number 5.75 in binary (101.11₂) can be normalised to 0.1011100 × 2³, giving mantissa 01011100 and exponent 0011.

示例：尾数 8 位（含符号），指数 4 位（补码），数字 5.75 的二进制形式 101.11₂ 可规格化为 0.1011100 × 2³，尾数为 01011100，指数为 0011。

7. Logic Gates and Truth Tables | 逻辑门与真值表

Logic gates are the physical implementation of Boolean functions. The SQA syllabus covers AND, OR, NOT, NAND, NOR, XOR, and XNOR gates. Each gate has a standard symbol and a corresponding truth table.

逻辑门是布尔函数的物理实现。SQA 教学大纲涵盖与门、或门、非门、与非门、或非门、异或门和同或门。每种门都有标准符号和相应的真值表。

AND gate output is 1 only if all inputs are 1. OR gate output is 1 if at least one input is 1. NOT gate inverts the input. NAND and NOR are the negated versions of AND and OR respectively.

与门只有在所有输入均为 1 时输出才为 1。或门只要至少一个输入为 1，输出即为 1。非门将输入取反。与非门和或非门分别是与门和或门的取反版本。

XOR (exclusive OR) outputs 1 if the inputs are different. XNOR outputs 1 if inputs are equal. These are widely used in arithmetic circuits and error detection.

异或门当输入不同时输出 1。同或门当输入相同时输出 1。它们广泛用于算术电路和错误检测。

AND truth table: 0·0=0, 0·1=0, 1·0=0, 1·1=1
OR truth table: 0+0=0, 0+1=1, 1+0=1, 1+1=1
NAND truth table: 0·0=1, 0·1=1, 1·0=1, 1·1=0
NOR truth table: 0+0=1, 0+1=0, 1+0=0, 1+1=0
XOR truth table: 0⊕0=0, 0⊕1=1, 1⊕0=1, 1⊕1=0
XNOR truth table: 0⊙0=1, 0⊙1=0, 1⊙0=0, 1⊙1=1

真值表：
与门：0·0=0, 0·1=0, 1·0=0, 1·1=1；
或门：0+0=0, 0+1=1, 1+0=1, 1+1=1；
与非门：0·0=1, 0·1=1, 1·0=1, 1·1=0；
或非门：0+0=1, 0+1=0, 1+0=0, 1+1=0；
异或门：0⊕0=0, 0⊕1=1, 1⊕0=1, 1⊕1=0；
同或门：0⊙0=1, 0⊙1=0, 1⊙0=0, 1⊙1=1。

8. Half and Full Adders | 半加器与全加器

A half adder is a basic digital circuit that adds two single bits and produces a sum bit and a carry bit. The sum is computed with an XOR gate; the carry is generated with an AND gate.

半加器是一个基本的数字电路，将两个单独的位相加，产生一个和位和一个进位位。和由异或门计算，进位由与门生成。

Half adder equations: SUM = A XOR B, CARRY = A AND B. It cannot accept a carry input from a previous stage, limiting its use to least significant bit addition only.

半加器方程：SUM = A 异或 B，CARRY = A 与 B。它无法接受来自前一级的进位输入，因此仅限用于最低有效位的加法。

A full adder extends the half adder by also accepting a carry-in bit (Cin). It consists of two half adders and an OR gate. The full adder equations: SUM = A XOR B XOR Cin, CARRY = (A AND B) OR (Cin AND (A XOR B)).

全加器在半加器基础上扩展，还能接受一个进位输入位 (Cin)。它由两个半加器和一个或门组成。全加器方程：SUM = A 异或 B 异或 Cin，CARRY = (A 与 B) 或 (Cin 与 (A 异或 B))。

Multiple full adders can be cascaded to form a ripple-carry adder for multi-bit numbers, though propagation delay can limit speed.

多个全加器可以级联形成行波进位加法器用于多位数字，但传输延迟会限制速度。

9. Data Representation: ASCII and Unicode | 数据表示：ASCII 与 Unicode

Characters are internally represented using numeric codes. ASCII (American Standard Code for Information Interchange) uses 7 bits to encode 128 characters, including letters, digits, and control characters.

字符在内部使用数字编码表示。ASCII（美国信息交换标准代码）使用 7 位编码 128 个字符，包括字母、数字和控制字符。

Extended ASCII uses an 8th bit to provide 256 characters, accommodating some accented letters and additional symbols. Unicode, in contrast, is a comprehensive encoding system designed to cover all writing systems. UTF-8, UTF-16, and UTF-32 are common encoding forms.

扩展 ASCII 使用第 8 位提供 256 个字符，容纳了一些带重音符号的字母和其他符号。相比之下，Unicode 是一个旨在涵盖所有书写系统的全面编码体系。UTF-8、UTF-16 和 UTF-32 是常见的编码形式。

The character ‘A’ has ASCII code 65 (01000001 in binary), ‘a’ is 97 (01100001), and ‘0’ is 48 (00110000). Understanding these mappings is important for text processing and conversions.

字符 ‘A’ 的 ASCII 码是 65（二进制 01000001），’a’ 是 97（01100001），’0′ 是 48（00110000）。理解这些映射对于文本处理和转换很重要。

10. File Size Calculations | 文件大小计算

Calculating file sizes for different media types is a common SQA exam topic. The general approach is to multiply the number of sampling units by the bit depth and divide appropriately to convert to bytes, kilobytes, or megabytes.

计算不同媒体类型的文件大小是 SQA 考试的常见主题。一般方法是将采样单元数乘以位深度，然后适当除以进率转换为字节、千字节或兆字节。

For a bitmap image: file size (bits) = width × height × colour depth. Colour depth is the number of bits per pixel. To get size in bytes, divide by 8. For example, a 1024×768 image with 24-bit colour: 1024 × 768 × 24 = 18,874,368 bits = 2,359,296 bytes ≈ 2.25 MB.

对于位图图像：文件大小（位）= 宽度 × 高度 × 颜色深度。颜色深度是每个像素的位数。要得到以字节为单位的大小，除以 8。例如，一幅 1024×768、24 位颜色的图像：1024 × 768 × 24 = 18,874,368 位 = 2,359,296 字节 ≈ 2.25 MB。

For audio: file size = sample rate × bit depth × number of channels × duration (seconds). A 3-minute CD-quality stereo track (44.1 kHz, 16-bit) would be: 44,100 × 16 × 2 × 180 = 253,440,000 bits ≈ 30.2 MB.

对于音频：文件大小 = 采样率 × 位深度 × 声道数 × 时长（秒）。一首 3 分钟 CD 品质的立体声曲目（44.1 kHz，16 位）的大小为：44,100 × 16 × 2 × 180 = 253,440,000 位 ≈ 30.2 MB。

For video without compression: size is roughly frame width × height × colour depth × frames per second × duration. Compression algorithms drastically reduce actual file sizes.

对于无压缩视频：大小大致为帧宽度 × 高度 × 颜色深度 × 每秒帧数 × 时长。压缩算法会大幅减少实际文件大小。

11. Algorithm Efficiency and Big O Notation | 算法效率与大 O 表示法

Algorithm analysis uses Big O notation to describe the upper bound of time or space complexity as input size grows. Higher Computing expects awareness of constant O(1), logarithmic O(log n), linear O(n), linear-log O(n log n), quadratic O(n²), and exponential O(2ⁿ) complexities.

算法分析使用大 O 表示法来描述随着输入规模增长的时间或空间复杂度的上界。高级计算机课程要求了解常数 O(1)、对数 O(log n)、线性 O(n)、线性对数 O(n log n)、平方 O(n²) 和指数 O(2ⁿ) 等复杂度。

Linear search on an unsorted list is O(n); binary search on a sorted array is O(log n). Bubble sort, insertion sort are O(n²) in the worst case, while merge sort and quick sort (average) are O(n log n).

无序列表的线性搜索是 O(n)；有序数组的二分查找是 O(log n)。冒泡排序、插入排序在最坏情况下是 O(n²)，而归并排序和快速排序（平均）是 O(n log n)。

Basic formula for summation of 1 to n: n(n+1)/2, which simplifies to O(n²). This often appears in loop analysis. Nested loops multiplies complexities.

1 到 n 求和的基本公式：n(n+1)/2，化简为 O(n²)。这经常出现在循环分析中。嵌套循环的复杂度相乘。

12. Computer Memory and Storage Units | 计算机内存与存储单位

Memory and storage capacities are expressed in bytes and their multiples. The SQA course expects you to know both binary (base-2) and decimal (base-10) interpretations, although for calculations, powers of 2 are standard.

内存和存储容量以字节及其倍数表示。SQA 课程要求了解二进制（基数为 2）和十进制（基数为 10）两种解释，尽管在计算中通常使用 2 的幂次。

Unit (单位)	Power of 2 (2 的幂)	Value in bytes (字节值)
1 KB (kilobyte)	2¹⁰	1,024 bytes
1 MB (megabyte)	2²⁰	1,048,576 bytes
1 GB (gigabyte)	2³⁰	1,073,741,824 bytes
1 TB (terabyte)	2⁴⁰	1,099,511,627,776 bytes

Note that storage manufacturers often use decimal units (1 KB = 1000 bytes), leading to apparent capacity differences. In the exam, assume binary units unless specified.

请注意，存储制造商通常使用十进制单位（1 KB = 1000 字节），这导致容量看起来有差异。除非另有说明，考试中应假定使用二进制单位。

RAM and cache memory sizes are given in bytes. Cache memory uses high-speed SRAM, and calculations involving processor word size and address bus width relate directly to memory addressing capabilities.

RAM 和缓存内存大小以字节给出。缓存内存使用高速 SRAM，涉及处理器字长和地址总线宽度的计算与内存寻址能力直接相关。

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SQA Higher Computing Formula & Theorem Quick Reference | SQA 高级计算机：公式定理速查手册