📚 Computer Fundamentals: Core Knowledge Points Explained | 计算机原理核心知识点解析
Computer principles form the bedrock of all computing studies. This guide breaks down the essential theories, architectures, and mechanisms that every student must master for exam success, from the Von Neumann model to binary arithmetic and beyond.
计算机原理是所有计算机学科学习的基石。本指南为你系统拆解必须掌握的核心理论、体系结构与运行机制，从冯·诺依曼模型到二进制运算，助你在考试中稳操胜券。
1. The Von Neumann Architecture | 冯·诺依曼架构
At the heart of almost every modern computer lies the Von Neumann architecture, first proposed by John von Neumann in 1945. Its defining feature is the stored-program concept, where both data and instructions reside in the same memory unit and are treated identically during processing.
几乎所有现代计算机的核心都基于冯·诺依曼架构，该架构由约翰·冯·诺依曼于1945年首次提出。其最显著的特征是”存储程序”概念——数据和指令都存放在同一存储器中，并在处理过程中被同等对待。
The architecture consists of five fundamental components:
该架构由五个基本部件组成：
- Central Processing Unit (CPU) | 中央处理器（CPU）
- Memory Unit (Main Memory) | 存储单元（主存）
- Input Devices | 输入设备
- Output Devices | 输出设备
- System Bus (connecting all components) | 系统总线（连接各部件）
The key implication of this design is that instructions are fetched from memory, decoded, and executed sequentially — a cycle that repeats billions of times per second in a modern processor.
这一设计的关键意义在于：指令从内存中取出、译码、然后按顺序执行——这个循环在现代处理器中每秒重复数十亿次。
2. CPU Components and Their Functions | CPU组成与功能
The CPU, often called the “brain” of the computer, contains several specialized subunits working in harmony. The two primary internal sections are the Control Unit (CU) and the Arithmetic Logic Unit (ALU).
CPU常被称为计算机的”大脑”，其内部包含多个协同工作的专用子单元，最主要的两个部分是控制单元（CU）和算术逻辑单元（ALU）。
The ALU performs all arithmetic operations (addition, subtraction, multiplication, division) and logical operations (AND, OR, NOT, comparison). The CU directs the entire system by generating control signals, managing instruction execution order, and coordinating data flow between components.
ALU负责执行所有算术运算（加、减、乘、除）和逻辑运算（与、或、非、比较）。CU则通过生成控制信号、管理指令执行顺序、协调各部件间的数据流动来指挥整个系统。
Key registers inside the CPU include:
CPU内部的关键寄存器包括：
- Program Counter (PC): holds the address of the next instruction | 程序计数器（PC）：存放下一条指令的地址
- Accumulator (ACC): stores intermediate results of calculations | 累加器（ACC）：存储计算的中间结果
- Memory Address Register (MAR): holds the address being accessed | 内存地址寄存器（MAR）：保存正在访问的地址
- Memory Data Register (MDR): holds data read from or written to memory | 内存数据寄存器（MDR）：保存从内存读取或写入内存的数据
- Current Instruction Register (CIR): holds the instruction currently being executed | 当前指令寄存器（CIR）：保存当前正在执行的指令
3. The Fetch-Decode-Execute Cycle | 取指-译码-执行周期
The fetch-decode-execute cycle is the fundamental operational loop of the CPU. Every instruction passes through these three distinct phases, and understanding this sequence is critical for exam questions on processor operation.
取指-译码-执行周期是CPU的基本运行循环。每条指令都要经历这三个不同阶段，理解这一流程对于解答处理器运行相关的考题至关重要。
Fetch (取指) → Decode (译码) → Execute (执行)
During the fetch phase, the address in the PC is copied to the MAR, the instruction is read from memory into the MDR, then transferred to the CIR, and finally the PC is incremented to point to the next instruction. In the decode phase, the CU interprets the instruction and determines what operation is required and what operands are involved. During the execute phase, the ALU performs the operation or the appropriate unit carries out the required action.
在取指阶段，PC中的地址被复制到MAR，指令从内存中被读入MDR，再传送到CIR，最后PC递增指向下一条指令。在译码阶段，CU解读指令，确定需要什么操作以及涉及哪些操作数。在执行阶段，ALU执行运算或相应单元完成所需操作。
For example, to add the number stored at address 500 to the accumulator:
例如，要将地址500处存储的数加到累加器中：
- PC places address of the ADD instruction into MAR | PC将ADD指令的地址送入MAR
- Instruction is fetched from memory into CIR | 指令从内存取入CIR
- CU decodes this as an ADD operation | CU将其译码为ADD操作
- Address 500 is placed in MAR, data is fetched into MDR | 地址500放入MAR，数据被取入MDR
- The ALU adds the value from MDR to the ACC | ALU将MDR中的值与ACC相加
4. Memory Hierarchy | 存储器层次结构
Modern computer systems use multiple levels of memory, each with different speeds, capacities, and costs. This hierarchy is designed to balance performance against expense, ensuring the CPU rarely has to wait for slow storage.
现代计算机系统使用多级存储器，每一级的速度、容量和成本各不相同。这种层次结构旨在平衡性能与成本，确保CPU极少需要等待慢速存储器。
| Level | 层级 | Speed | 速度 | Capacity | 容量 | Example | 实例 |
| 1 (Fastest) | 1（最快） | ~1 ns | ~1纳秒 | Very small | 极小 | CPU Registers | CPU寄存器 |
| 2 | 2 | ~2-10 ns | ~2-10纳秒 | Tiny | 很小 | Cache (L1/L2) | 缓存（L1/L2） |
| 3 | 3 | ~50-100 ns | ~50-100纳秒 | Moderate | 中等 | Main Memory (RAM) | 主存（RAM） |
| 4 (Slowest) | 4（最慢） | ~5-15 ms | ~5-15毫秒 | Very large | 极大 | Hard Disk / SSD | 硬盘 / 固态硬盘 |
Cache memory is a small, high-speed memory located close to the CPU. It stores frequently accessed data and instructions, significantly reducing the average time needed to access memory. Virtual memory, by contrast, uses part of the hard disk as an extension of RAM when physical memory is insufficient.
缓存是一种位于CPU附近的小容量高速存储器。它存储频繁访问的数据和指令，显著降低了访问内存的平均时间。相比之下，虚拟内存在物理内存不足时，将硬盘的一部分用作RAM的扩展空间。
Average Access Time = Hit Rate × Cache Time + (1 − Hit Rate) × Main Memory Time
平均访问时间 = 命中率 × 缓存时间 + (1 − 命中率) × 主存时间
5. Binary Arithmetic and Two’s Complement | 二进制运算与补码
All data in a computer is ultimately represented in binary — a base-2 system using only 0 and 1. Each binary digit is called a “bit,” and eight bits form a “byte.” Understanding binary, hexadecimal, and their conversions is essential for any computer science examination.
计算机中所有数据最终都以二进制表示——一种仅使用0和1的基2系统。每个二进制数字称为一个”位”（bit），每8个位组成一个”字节”（byte）。理解二进制、十六进制及其相互转换是任何计算机科学考试的必备内容。
For signed numbers, the two’s complement representation is the standard method. The leftmost bit indicates the sign (0 for positive, 1 for negative), and negative numbers are obtained by inverting all bits and adding 1.
对于有符号数，补码表示法是标准方法。最左边一位表示符号（0为正数，1为负数），负数的计算方法是：将所有位取反再加1。
Example: represent −5 using 8-bit two’s complement:
示例：用8位补码表示−5：
+5 = 0000 0101 → invert → 1111 1010 → add 1 → 1111 1011
Why do we use two’s complement? Because addition and subtraction share the same hardware circuit. Adding a negative number is equivalent to performing subtraction. Overflow occurs when the result exceeds the range representable by the available bits.
为什么要用补码？因为加法和减法可以共用同一套硬件电路。加上一个负数等价于执行减法。当结果超出可用位数可表示的范围时，就会发生溢出。
6. Representing Floating-Point Numbers | 浮点数表示
Real numbers require floating-point representation. The IEEE 754 standard defines the most widely used format, which separates a number into three parts: sign, exponent, and mantissa.
实数需要浮点表示。IEEE 754标准定义了最广泛使用的格式，它将一个数分为三部分：符号位、阶码和尾数。
Number = (−1)ⁿ × Mantissa × Base^Exponent
In binary scientific notation, the mantissa always begins with an implicit leading 1 (for normalized numbers), and the exponent is stored in a biased form. For a single-precision (32-bit) format, there is 1 bit for the sign, 8 bits for the exponent, and 23 bits for the mantissa.
在二进制科学记数法中，规范化数的尾数前总是有一个隐含的1，阶码则以偏移形式存储。对于单精度（32位）格式：1位符号位、8位阶码、23位尾数。
Converting a decimal number to IEEE 754:
将十进制数转换为IEEE 754格式：
- Convert to binary | 转换为二进制
- Normalize to the form 1.xxx × 2ⁿ | 规范化为1.xxx × 2ⁿ的形式
- Store the fractional part in the mantissa | 将小数部分存入尾数
- Add the bias (127 for single precision) to the exponent and store it | 将阶码加偏移量（单精度为127）后存储
Exam tip: Always check for rounding errors when converting between decimal and binary floating-point, as many decimal fractions cannot be represented exactly in binary.
考试提示：在十进制与二进制浮点之间转换时，务必检查舍入误差，因为许多十进制小数无法在二进制中被精确表示。
7. Logic Gates and Boolean Algebra | 逻辑门与布尔代数
Logic gates are the fundamental building blocks of all digital circuits. Each gate performs a specific Boolean operation on one or more binary inputs to produce a binary output. The six most important gates are NOT, AND, OR, NAND, NOR, and XOR.
逻辑门是所有数字电路的基本构件。每个门对一个或多个二进制输入执行特定的布尔运算，产生一个二进制输出。最重要的六种门电路是：非门（NOT）、与门（AND）、或门（OR）、与非门（NAND）、或非门（NOR）和异或门（XOR）。
| Gate | 门 | Function | 功能 | Symbol | 符号 | Boolean Expression | 布尔表达式 |
| AND | 与门 | Output 1 only if all inputs are 1 | 仅当所有输入为1时输出1 | A · B | Q = A ∧ B |
| OR | 或门 | Output 1 if at least one input is 1 | 至少一个输入为1时输出1 | A + B | Q = A ∨ B |
| NOT | 非门 | Inverts the input | 反转输入 | A̅ | Q = ¬A |
| XOR | 异或门 | Output 1 if inputs differ | 输入不同时输出1 | A ⊕ B | Q = A ⊻ B |
Boolean algebra provides the mathematical framework for designing and simplifying digital circuits. Key rules include De Morgan’s laws:
布尔代数提供了设计和化简数字电路的数学框架。关键定律包括德摩根定律：
¬(A ∧ B) = ¬A ∨ ¬B
¬(A ∨ B) = ¬A ∧ ¬B
These laws are extremely useful for simplifying complex expressions and are a frequent topic in exam questions requiring circuit simplification.
这些定律在化简复杂表达式方面极其有用，也是考试中电路化简题型的常客。
8. Interrupts and Input/Output | 中断与输入/输出
The CPU communicates with external devices through an input/output (I/O) system. Two main approaches exist: programmed I/O, where the CPU waits for a device to become ready; and interrupt-driven I/O, where the device signals the CPU when it requires attention.
CPU通过输入/输出（I/O）系统与外部设备通信。主要有两种方式：程序控制I/O（CPU等待设备就绪）和中断驱动I/O（设备需要服务时向CPU发送信号）。
An interrupt is a signal that temporarily halts the current program so the CPU can handle a more urgent task. The interrupt handling process follows a standard sequence:
中断是一种暂时暂停当前程序、使CPU能够处理更紧急任务的信号。中断处理过程遵循标准流程：
- The device sends an interrupt request to the CPU | 设备向CPU发送中断请求
- The CPU finishes the current instruction, then acknowledges the interrupt | CPU执行完当前指令后确认中断
- The contents of key registers (including the PC) are saved onto the stack | 关键寄存器（包括PC）的内容被压入栈保存
- The PC is loaded with the address of the Interrupt Service Routine (ISR) | PC被载入中断服务程序（ISR）的地址
- After the ISR completes, saved registers are restored | ISR完成后，恢复保存的寄存器
- The original program resumes exactly where it left off | 原程序从断点处继续执行
The main advantage of interrupt-driven I/O is efficiency: the CPU doesn’t waste time polling devices and can execute other tasks while waiting for device operations to complete.
中断驱动I/O的主要优势在于效率：CPU无需浪费时间去轮询设备，可以在等待设备操作完成期间执行其他任务。
9. Operating System Fundamentals | 操作系统基础
An operating system (OS) is system software that manages computer hardware and provides services for application programs. Its core responsibilities include process management, memory management, file management, and device management.
操作系统（OS）是管理计算机硬件并为应用程序提供服务的系统软件。其核心职责包括：进程管理、内存管理、文件管理和设备管理。
Process management involves scheduling — deciding which process gets the CPU at any given time. Common scheduling algorithms include First-Come-First-Served (FCFS), Shortest Job First (SJF), and Round Robin. Each algorithm has trade-offs between throughput, response time, and fairness.
进程管理涉及调度——决定任意时刻哪个进程获得CPU使用权。常见的调度算法包括：先来先服务（FCFS）、短作业优先（SJF）和时间片轮转（Round Robin）。每种算法都在吞吐量、响应时间和公平性之间有所取舍。
Memory management techniques include paging and segmentation. In paging, memory is divided into fixed-size blocks called “pages,” which can be swapped between RAM and disk. This forms the basis of virtual memory systems.
内存管理技术包括分页和分段。在分页中，内存被划分为称为”页”的固定大小块，可在RAM与磁盘之间交换，这是虚拟内存系统的基础。
CPU Utilization = 1 − pⁿ
This formula represents the probability that the CPU remains busy, where p is the fraction of time a process spends waiting for I/O and n is the degree of multiprogramming.
该公式表示CPU保持忙碌的概率，其中p是进程等待I/O所花费的时间比例，n是多道程序度。
10. Data Transmission and Error Detection | 数据传输与错误检测
Data transmission can be serial (one bit at a time) or parallel (multiple bits simultaneously). Serial transmission is preferred for long distances due to lower cost and reduced signal interference, while parallel transmission is faster over short distances.
数据传输可以是串行（一次一位）或并行（同时多位）。串行传输因成本低、信号干扰小而更适合长距离；并行传输在短距离内速度更快。
To ensure data integrity during transmission, error detection methods are essential. Three fundamental techniques are commonly examined:
为确保传输过程中的数据完整性，错误检测方法必不可少。以下是三种常考的基本技术：
- Parity Check | 奇偶校验: adds an extra bit to make the total number of 1s either even (even parity) or odd (odd parity) | 增加一个额外位，使1的总数为偶数（偶校验）或奇数（奇校验）
- Checksum | 校验和: sums all data values and transmits the sum; the receiver recalculates and compares | 将所有数据值求和并传送总和，接收方重新计算并比较
- Cyclic Redundancy Check (CRC) | 循环冗余校验: uses polynomial division to generate a check value | 使用多项式除法生成校验值
These methods detect errors but do not correct them. For error correction, techniques such as Automatic Repeat reQuest (ARQ) — where the receiver requests retransmission of corrupted data — are employed. This fundamental distinction between detection and correction is a key exam topic.
这些方法能检测错误但不能纠正错误。对于纠错，则采用自动重传请求（ARQ）等技术——接收方请求重传损坏的数据。检测与纠正之间的这一根本区别是重要的考点。
11. Assembly Language and Instruction Sets | 汇编语言与指令集
Assembly language is a low-level programming language that uses mnemonics to represent machine code instructions. Each assembly instruction corresponds directly to one machine code instruction, making it machine-specific.
汇编语言是一种低级编程语言，使用助记符来表示机器码指令。每条汇编指令直接对应一条机器码指令，因此它依赖于特定的机器架构。
Instruction sets can be classified into two main categories: Complex Instruction Set Computing (CISC) and Reduced Instruction Set Computing (RISC). CISC processors offer many complex, multi-step instructions, while RISC processors use a smaller set of simple, single-cycle instructions.
指令集可分为两大类：复杂指令集计算（CISC）和精简指令集计算（RISC）。CISC处理器提供许多复杂的多步指令，RISC处理器则使用更小的一组简单单周期指令。
Common addressing modes that students must understand:
学生必须掌握的常见寻址方式：
- Immediate addressing: the operand is part of the instruction itself | 立即寻址：操作数包含在指令中
- Direct addressing: the operand is the actual memory address | 直接寻址：操作数就是实际内存地址
- Indirect addressing: the operand is an address that points to another memory location | 间接寻址：操作数是指向另一个内存位置的地址
- Indexed addressing: effective address = base address + index register value | 变址寻址：有效地址 = 基址 + 变址寄存器值
For example, the instruction LDA #100 uses immediate addressing to load the value 100 directly into the accumulator. In contrast, LDA 100 loads the value stored at memory address 100.
例如，指令LDA #100使用立即寻址将值100直接载入累加器。相比之下，LDA 100加载的是存储在地址100处的值。
12. Secure Computing and Ethics | 安全计算与伦理
Modern computing systems face a range of security threats. Understanding these threats is essential for both practical system design and theoretical examination questions.
现代计算系统面临一系列安全威胁。理解这些威胁，对于实际系统设计和理论考试都至关重要。
Malware — malicious software designed to damage or exploit systems — includes viruses, worms, Trojan horses, ransomware, and spyware. Each type spreads differently and has different effects. Phishing attacks deceive users into revealing sensitive information, often through fake emails or websites. Encryption protects data by converting plaintext into ciphertext using a cryptographic key.
恶意软件——旨在破坏或利用系统的恶意程序——包括病毒、蠕虫、木马、勒索软件和间谍软件。每种类型的传播方式和危害不同。网络钓鱼攻击通常通过伪造电子邮件或网站欺骗用户泄露敏感信息。加密则通过使用密钥将明文转换为密文来保护数据。
| Threat | 威胁 | Definition | 定义 | Countermeasure | 防护措施 |
| Virus | 病毒 | Self-replicating code attached to host files | 附着在宿主文件上自我复制的代码 | Antivirus software | 杀毒软件 |
| Phishing | 钓鱼 | Fraudulent communication to steal credentials | 通过欺诈通信窃取凭证 | User training, email filtering | 用户培训、邮件过滤 |
| Man-in-the-Middle | 中间人攻击 | Attacker intercepts and relays messages | 攻击者截获并转发消息 | Encryption (TLS/SSL) | 加密（TLS/SSL） |
Beyond security, computer ethics address the responsible use of technology — including intellectual property rights (copyright), data privacy, and the environmental impact of hardware production and disposal.
除了安全之外，计算机伦理还涉及技术的负责任使用——包括知识产权（版权）、数据隐私，以及硬件生产和废弃对环境的影响。
Mastering these core computer principles provides a solid foundation for any advanced study or career in computing. Every concept discussed — from the Von Neumann architecture to secure communication — builds upon the others, forming a coherent picture of how computers truly work. Practice converting between number systems, trace the fetch-decode-execute cycle step by step, and drill Boolean algebra simplification to secure top marks in your examinations.
掌握这些计算机核心原理，为你在计算机领域的任何深入学习或职业发展奠定了坚实的基础。从冯·诺依曼架构到安全通信，本文讨论的每一个概念都相互关联，共同构成计算机真实运行方式的完整图景。勤练进制转换、逐步追踪取指-译码-执行周期、反复演练布尔代数化简，定能在考试中斩获高分。
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