Boolean Algebra for GCSE CIE Computer Science | GCSE CIE 计算机：布尔代数考点精讲

📚 Boolean Algebra for GCSE CIE Computer Science | GCSE CIE 计算机：布尔代数考点精讲

Boolean algebra is a fundamental topic in the CIE IGCSE and O Level Computer Science syllabus, underpinning how digital circuits make decisions. Mastering this area means you can simplify logic expressions, design efficient circuits, and trace truth tables with confidence. This revision guide walks you through every essential concept, from basic gates and truth tables to Karnaugh maps and De Morgan’s laws, equipping you with the knowledge to excel in both written papers and practical problem-solving.

布尔代数是 CIE IGCSE 和 O Level 计算机科学大纲中的基础主题，它支撑着数字电路如何进行决策。掌握这一领域意味着你可以自信地简化逻辑表达式、设计高效电路并追踪真值表。本复习指南将带你走过每一个核心概念，从基本门电路和真值表到卡诺图和德摩根定律，让你具备在笔试和实践问题解决中脱颖而出的知识。

1. Boolean Values and Basic Operators | 布尔值与基本运算符

In Boolean algebra, every variable can take only one of two values: 0 (FALSE) or 1 (TRUE). These binary states represent off/on, low/high, or false/true in digital systems. The three fundamental operations are AND (conjunction), OR (disjunction), and NOT (negation). Understanding how these operators combine inputs to produce an output is the first step toward logic simplification.

在布尔代数中，每个变量只能取两个值之一：0（假）或 1（真）。这两种二进制状态在数字系统中代表关/开、低/高或假/真。三种基本运算是与（合取）、或（析取）和非（否定）。理解这些运算符如何组合输入以产生输出是逻辑简化的第一步。

The AND operation outputs 1 only if all inputs are 1. Its symbol is a dot (·) or simply the absence of an operator, e.g., A·B or AB.

与运算仅在所有输入均为 1 时输出 1。其符号为点（·）或省略运算符，例如 A·B 或 AB。

The OR operation outputs 1 if at least one input is 1. It is represented by a plus sign (+), e.g., A+B.

或运算在至少一个输入为 1 时输出 1。它用加号（+）表示，例如 A+B。

The NOT operation inverts the input: 1 becomes 0, 0 becomes 1. It is denoted by an overbar ( Ā ), a prime ( A’ ), or a negation symbol (¬A). For GCSE CIE, the overbar notation is most common, e.g., NOT A is written as A.

非运算将输入取反：1 变为 0，0 变为 1。它用上划线（Ā）、撇号（A’）或否定符号（¬A）表示。对于 GCSE CIE，上划线表示法最常见，例如 NOT A 写作 A。

A	B	A AND B	A OR B	NOT A
0	0	0	0	1
0	1	0	1	1
1	0	0	1	0
1	1	1	1	0

2. Logic Gates: Symbols and Truth Tables | 逻辑门：符号与真值表

Each Boolean operator corresponds to a physical logic gate in hardware. The CIE syllabus expects you to recognise and draw the standard symbols for NOT, AND, OR, NAND, NOR, XOR (EOR) and XNOR gates, and to construct their truth tables. A truth table lists all possible input combinations and the resulting output, providing a complete description of the gate’s behaviour.

每个布尔运算符在硬件中都对应一个物理逻辑门。CIE 大纲要求你识别并绘制非门、与门、或门、与非门、或非门、异或门和同或门的标准符号，并构建它们的真值表。真值表列出了所有可能的输入组合及其输出，完整描述了门的行为。

The NAND gate is an AND followed by a NOT; it gives 0 only when all inputs are 1. The NOR gate is an OR followed by a NOT; it gives 1 only when all inputs are 0. The XOR gate outputs 1 when the inputs are different, and the XNOR gate outputs 1 when the inputs are the same.

与非门是与门后接非门；仅在所有输入均为 1 时输出 0。或非门是或门后接非门；仅在所有输入均为 0 时输出 1。异或门在输入不同时输出 1，同或门在输入相同时输出 1。

Truth table for a 2-input NAND: (A NAND B) = A·B

双输入与非门真值表：(A NAND B) = A·B

A	B	NAND Output
0	0	1
0	1	1
1	0	1
1	1	0

When drawing logic diagrams, always use clear, rectangular shapes with labelled inputs and outputs. For NAND and NOR, the standard symbols include a small inversion circle (bubble) at the output. For XOR, the symbol is an OR gate with an extra curved line on the input side. You may be asked to complete a truth table for a given logic diagram, so practice tracing signals through multiple gates.

在绘制逻辑图时，始终使用清晰的矩形形状，并标记输入和输出。对于与非门和或非门，标准符号在输出端包含一个小反相圈（气泡）。异或门的符号是一个或门，但在输入端一侧有一条额外的曲线。你可能会被要求为给定的逻辑图填写真值表，因此要练习通过多个门追踪信号。

3. Boolean Expressions and Logic Circuits | 布尔表达式与逻辑电路

A Boolean expression describes how inputs are combined using AND, OR and NOT. For example, Q = (A AND B) OR (NOT C) can be written as Q = A·B + C. The bracketing and order of operations matter: NOT takes highest priority, then AND, then OR. This is similar to arithmetic precedence.

布尔表达式描述了如何使用与、或、非组合输入。例如，Q = (A AND B) OR (NOT C) 可写作 Q = A·B + C。括号和运算顺序很重要：非的优先级最高，其次是与，最后是或。这类似于算术优先级。

To convert a circuit diagram into an expression, work from the inputs towards the output, writing the sub-expression at each gate’s output. Conversely, given an expression, you can draw a logic circuit by creating gates for each operation and connecting them accordingly. This skill is regularly tested in CIE paper 2 and paper 1.

要将电路图转换为表达式，从输入向输出方向进行，在每个门的输出处写下子表达式。反之，给定一个表达式，你可以通过为每种运算创建门并相应地连接它们来绘制逻辑电路。这项技能在 CIE 的试卷 2 和试卷 1 中经常考查。

Example: Draw the circuit for X = A·B + C. Start with a NOT gate for A, then an AND gate combining NOT A with B, and finally an OR gate that takes the AND output and C. Always label intermediate connections clearly.

示例：为 X = A·B + C 绘制电路。首先，为 A 放置一个非门，然后使用一个与门将非 A 和 B 结合起来，最后用一个或门取与门的输出和 C 作为输入。始终清晰地标记中间连接。

Exam questions may ask you to complete a truth table from an expression. Here you must systematically list all input combinations (for n inputs there are 2ⁿ rows) and evaluate the expression step by step. Start with the innermost operations, using intermediate columns to reduce mistakes.

考试题目可能会要求你根据表达式填写真值表。此时你必须系统地列出所有输入组合（对于 n 个输入，有 2ⁿ 行），并逐步求值表达式。从最内层的运算开始，使用中间列来减少错误。

4. The Laws of Boolean Algebra | 布尔代数的定律

To simplify logic expressions, you must know the key Boolean laws. These identities allow you to reduce the number of gates, which saves cost and improves performance in real circuits. The CIE specification expects you to apply these laws without necessarily naming them, but knowing the names aids recall.

为了简化逻辑表达式，你必须了解关键的布尔定律。这些恒等式可以让你减少门电路的数量，从而在实际电路中节省成本并提高性能。CIE 规范要求你应用这些定律，不一定需要说出名称，但知道名称有助于记忆。

Identity Law: A + 0 = A ; A · 1 = A
零一律： A + 0 = A ; A · 1 = A
Null (Annulment) Law: A + 1 = 1 ; A · 0 = 0
零律（湮灭律）： A + 1 = 1 ; A · 0 = 0
Idempotent Law: A + A = A ; A · A = A
幂等律： A + A = A ; A · A = A
Complement Law: A + A = 1 ; A · A = 0
互补律： A + A = 1 ; A · A = 0
Double Negation (Involution): A = A
双重否定律（对合律）： A = A
Commutative Law: A + B = B + A ; A · B = B · A
交换律： A + B = B + A ; A · B = B · A
Associative Law: A + (B + C) = (A + B) + C ; A · (B · C) = (A · B) · C
结合律： A + (B + C) = (A + B) + C ; A · (B · C) = (A · B) · C
Distributive Law: A · (B + C) = A·B + A·C ; A + (B·C) = (A+B) · (A+C)
分配律： A · (B + C) = A·B + A·C ; A + (B·C) = (A+B) · (A+C)
Absorption Law: A + (A·B) = A ; A · (A+B) = A
吸收律： A + (A·B) = A ; A · (A+B) = A
Redundancy Law: A + (A·B) = A + B ; A · (A+B) = A·B (useful derived form)
冗余律： A + (A·B) = A + B ; A · (A+B) = A·B（有用的推导形式）

Practice applying these laws by simplifying expressions like Q = A·B + A·B. Using the Distributive Law: A·(B + B) = A·1 = A. Such simplifications are common in exam problems where you must prove two expressions are equivalent or draw the simpler circuit.

通过简化诸如 Q = A·B + A·B 这样的表达式来练习应用这些定律。使用分配律：A·(B + B) = A·1 = A。此类简化在需要证明两个表达式等价的考试问题中很常见，或者要求你画出更简单的电路。

5. De Morgan’s Laws | 德摩根定律

De Morgan’s Laws are essential tools for transforming expressions, especially when converting ANDs to ORs and vice versa under negation. The two laws state:

德摩根定律是变换表达式的关键工具，尤其是在否定条件下将‘与’转换为‘或’以及反向转换时。这两个定律陈述如下：

A·B = A + B

A+B = A · B

In words, the complement of a conjunction is the disjunction of the complements; the complement of a disjunction is the conjunction of the complements. These laws are frequently tested in CIE scenarios where you need to implement a function using only NAND gates or only NOR gates.

用语言来说，合取的补是补的析取；析取的补是补的合取。这些定律在 CIE 的场景中经常考查，例如你需要仅使用与非门或仅使用或非门来实现一个函数。

For example, to express AND using only NAND gates, note that A·B = A·B = NAND followed by NOT, but using De Morgan’s you can design an entire circuit with a single type of gate. Try proving that a NAND gate, with its inputs tied together, acts as a NOT gate: A·A = A.

例如，要仅使用与非门表达与运算，注意 A·B = A·B = 与非门后接非门，但利用德摩根定律，你可以用单一类型门设计整个电路。尝试证明当与非门的输入端连接在一起时，它充当非门：A·A = A。

When simplifying an expression such as A·B + C, apply De Morgan step by step: A·B + C = (A·B) · C = (A+B)·C. Always break the expression at the outermost operator before distributing the negation.

当简化像 A·B + C 这样的表达式时，逐步应用德摩根定律：A·B + C = (A·B) · C = (A+B)·C。始终在最外层的运算符处断开表达式，然后再分配否运算。

6. Simplifying Logic Expressions | 简化逻辑表达式

Simplification is a core practical skill. The goal is to reduce the number of literals (appearances of variables) and operators, which leads to smaller, faster circuits. Besides algebraic manipulation using the laws, two systematic methods are used: Karnaugh maps (K-maps) and truth-table-based spotting of patterns. CIE expects candidates to simplify up to 4 variables using K-maps.

简化是一项核心实践技能。目标是减少文字（变量出现次数）和运算符的数量，从而得到更小、更快的电路。除了使用定律进行代数操作外，还有两种系统化方法：卡诺图（K-map）和基于真值表的模式识别。CIE 期望考生能够使用卡诺图简化最多 4 个变量的表达式。

A K-map is a grid that rearranges the truth table so that adjacent cells differ by only one variable. For 2 variables, it’s a 2×2 grid; for 3 variables, a 2×4 grid; for 4 variables, a 4×4 grid. You group adjacent 1s in powers of two (1, 2, 4, 8) to form prime implicants, then write the simplified sum-of-products expression.

卡诺图是一个网格，它重新排列真值表，使得相邻单元之间只有一个变量不同。对于 2 个变量，它是一个 2×2 的网格；对于 3 个变量，是 2×4 的网格；对于 4 个变量，是 4×4 的网格。你以 2 的幂（1、2、4、8）分组相邻的 1 以形成质蕴含项，然后写出简化的积之和表达式。

For example, a 3-variable K-map for the expression F(A,B,C) = Σ(1,3,4,6) (where 1 = 001, 3 = 011, 4 = 100, 6 = 110) yields groups that correspond to F = A·C + A·C. This simplification eliminates variable B entirely.

例如，对于表达式 F(A,B,C) = Σ(1,3,4,6)（其中 1 = 001，3 = 011，4 = 100，6 = 110）的 3 变量卡诺图，得到的分组对应 F = A·C + A·C。此简化完全消除了变量 B。

Always check the result by verifying the truth table: original and simplified expressions must have identical outputs for all inputs. In exams, you may be asked to compare the number of gates before and after simplification, so be prepared to draw both circuits.

始终通过验证真值表来检查结果：原始表达式和简化后的表达式对于所有输入必须具有相同的输出。在考试中，你可能会被要求比较简化前后的门电路数量，所以准备好画出两种电路。

7. Half Adders and Full Adders | 半加器与全加器

Combinational logic circuits that perform addition are fundamental building blocks in the CPU’s Arithmetic Logic Unit (ALU). A half adder adds two single-bit numbers and produces a sum bit (S) and a carry bit (C). Its logic equations are:

执行加法的组合逻辑电路是 CPU 算术逻辑单元 (ALU) 中的基本构建块。半加器将两个一位二进制数相加，并产生一个和位 (S) 和一个进位位 (C)。其逻辑方程为：

S = A XOR B ; C = A AND B

S = A 异或 B ; C = A 与 B

A half adder cannot handle a carry from a previous addition, so to add multi-bit numbers we chain full adders. A full adder has three inputs: A, B, and Carry-in (Cᵢₙ). It produces Sum (S) and Carry-out (Cₒᵤₜ). The equations are:

半加器无法处理来自前一位加法的进位，因此为了对多位数进行相加，我们级联全加器。全加器有三个输入：A、B 和进位输入 (Cᵢₙ)。它产生和 (S) 和进位输出 (Cₒᵤₜ)。方程如下：

S = A XOR B XOR Cᵢₙ

Cₒᵤₜ = (A AND B) OR (Cᵢₙ AND (A XOR B))

By cascading full adders (connecting Cₒᵤₜ of one to Cᵢₙ of the next), we can build a multi-bit adder, e.g., a 4-bit ripple carry adder. The CIE syllabus may ask you to draw the circuit for a full adder using basic gates or to trace addition through a diagram.

通过级联全加器（将一个的 Cₒᵤₜ 连接到下一个的 Cᵢₙ），我们可以构建多位加法器，例如 4 位行波进位加法器。CIE 大纲可能会要求你使用基本门绘制全加器电路，或通过图表跟踪加法过程。

Understand that the XOR gate plays a crucial role in sum generation. If you spot an XOR in a circuit, it’s often part of arithmetic logic. Practice deriving the full adder truth table from its logic expression to reinforce your understanding of combinational logic.

要理解异或门在生成和的过程中起着至关重要的作用。如果你在电路中发现异或门，它通常是算术逻辑的一部分。练习从逻辑表达式推导全加器的真值表，以巩固你对组合逻辑的理解。

8. Boolean Algebra and Logic Gate Exam Questions | 布尔代数与逻辑门考试题型

CIE IGCSE Computer Science papers typically feature Boolean algebra in both multiple-choice (Paper 1) and written (Paper 2) formats. Common question styles include:

CIE IGCSE 计算机科学试卷通常在选择题（试卷 1）和笔试题（试卷 2）中都包含布尔代数。常见的题型包括：

Complete the truth table for a given logic circuit or expression.
为给定的逻辑电路或表达式填写真值表。
Draw the logic circuit for the Boolean expression.
根据布尔表达式绘制逻辑电路。
Simplify a Boolean expression using laws or a K-map.
使用定律或卡诺图简化布尔表达式。
Prove that two logic circuits are equivalent.
证明两个逻辑电路等效。
Construct a logic circuit using only NAND or only NOR gates.
仅使用与非门或仅使用或非门构建逻辑电路。
Explain the purpose or operation of a half/full adder.
解释半/全加器的用途或操作。

When simplifying, show every step clearly. Even if you make a small algebraic slip, method marks are awarded. Label intermediate expressions when drawing circuits. For K-maps, draw the grid neatly and circle your groups with the corresponding product term written next to them.

进行简化时，每一步都要清晰地展示出来。即使你在代数上犯了一个小错，也会得到方法分。绘制电路时标记中间表达式。对于卡诺图，整齐地画出网格，并用圆圈标出你的分组，在它们旁边写上相应的乘积项。

A common pitfall is misinterpreting operator precedence. Remember: NOT first, then AND, then OR. Use brackets to avoid ambiguity. Also, double-check De Morgan’s applications: break the line, change the sign (AND ↔ OR), and invert literals.

一个常见的陷阱是误解运算符优先级。记住：先非，后与，最后或。使用括号以避免歧义。此外，仔细检查德摩根定律的应用：断开长线，改变符号（与 ↔ 或），并对文字取反。

9. Real-world Applications and Context | 实际应用与情境

Boolean algebra is not just an academic exercise; it’s the foundation of digital electronics, from simple alarm systems to complex microprocessors. Sensor-activated lights, lift control systems, and data encryption all rely on combinational and sequential logic. Understanding how a truth table maps to a control scenario helps you answer application-based questions.

布尔代数不仅仅是学术练习；它是数字电子学的基础，从简单的报警系统到复杂的微处理器。传感器激活的灯光、电梯控制系统和数据加密都依赖于组合逻辑和时序逻辑。理解真值表如何映射到控制场景有助于你回答基于应用的问题。

For instance, a heating system might turn on (H=1) if the temperature is low (T=1) and the system is enabled (E=1), or if the manual override (M=1) is active. The Boolean expression would be H = T·E + M. You can then design a circuit and simplify if necessary.

例如，如果温度低 (T=1) 且系统已启用 (E=1)，或者手动越控处于活动状态 (M=1)，则加热系统可能开启 (H=1)。布尔表达式将是 H = T·E + M。然后你可以设计一个电路，并在必要时进行简化。

CIE often includes such scenario-based problems where you must derive an expression from a worded description. Always first identify the output, then the conditions that make it TRUE, and write a sum-of-products expression. Finally, simplify using a K-map or Boolean laws if required.

CIE 经常包含此类基于场景的问题，你必须从文字描述中推导出表达式。始终先确定输出，然后确定使其为真的条件，并写出析取范式表达式。最后，如果需要，使用卡诺图或布尔定律进行简化。

10. Key Tips for Exam Success | 考试成功的关键提示

To master Boolean algebra for CIE Computer Science, follow these proven strategies:

要掌握 CIE 计算机科学中的布尔代数，请遵循以下经过验证的策略：

Memorise the truth tables for all basic gates, especially XOR and XNOR, as they are less intuitive.
熟记所有基本门的真值表，尤其是异或门和同或门，因为它们不太直观。
Practise K-maps until you can group quickly. Use the rule that groups must be rectangular and as large as possible.
练习卡诺图直到你能快速分组。使用分组必须是矩形且尽可能大的规则。
Check your simplifications by substituting sample inputs into both the original and simplified expressions.
通过将样本输入代入原始表达式和简化后的表达式来检查你的简化。
Read the question carefully – some ask for the final circuit, others for the intermediate expression.
仔细阅读问题——有些要求最终电路，有些要求中间表达式。
Show your working when drawing circuits, start from the output and work backwards if it helps.
展示你的工作过程，在绘制电路时，如果有帮助，可以从输出端开始，逆向工作。

Boolean algebra accounts for about 10-15% of the CIE IGCSE Computer Science assessment. By consistently applying the laws and practising past papers, you can turn this topic into a reliable source of marks. Remember, clarity in expression and circuit diagrams is as important as correctness.

布尔代数约占 CIE IGCSE 计算机科学评估的 10-15%。通过持续应用定律并练习往年真题，你可以将这个主题变成可靠的得分来源。记住，表达式和电路图的清晰性与正确性同样重要。

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Boolean Algebra for GCSE CIE Computer Science | GCSE CIE 计算机：布尔代数 考点精讲