📚 Boolean Algebra Revision for A-Level CIE Computer Science | A-Level CIE 计算机：布尔代数考点精讲
Boolean Algebra forms the mathematical foundation of digital logic and computer circuits. In the CIE A-Level Computer Science syllabus, you are expected to master the laws, simplification techniques, truth tables, logic gates, and Karnaugh maps. This article brings together all the key concepts, worked examples, and exam tips you need to achieve top marks.
布尔代数是数字逻辑和计算机电路的数学基础。在CIE A-Level计算机科学课程中，你需要掌握布尔代数定律、化简方法、真值表、逻辑门和卡诺图。本文汇总了所有关键概念、典型例题和考试技巧，助你冲击高分。
1. Basic Boolean Operations and Truth Tables | 基本布尔运算与真值表
Boolean algebra works with binary variables that can only take the values 0 (False) or 1 (True). The three fundamental operations are AND (conjunction), OR (disjunction), and NOT (negation).
布尔代数处理只能取0（假）或1（真）的二进制变量。三种基本运算是与（合取）、或（析取）和非（取反）。
- AND (A ⋅ B): The output is 1 only when all inputs are 1. Symbol: dot (⋅) or no operator.
- AND (A ⋅ B)：仅当所有输入都为1时输出才为1。符号：点（⋅）或省略运算符。
- OR (A + B): The output is 1 if at least one input is 1. Symbol: plus (+).
- OR (A + B)：只要至少一个输入为1，输出就是1。符号：加号（+）。
- NOT (¬A or A̅): Unary operation that inverts the input (0 becomes 1, 1 becomes 0).
- NOT (¬A 或 A̅)：一元运算，反转输入（0变1，1变0）。
Truth tables illustrate every possible input combination and the resulting output. For example, the XOR (exclusive OR) operation A ⊕ B is 1 when A and B differ. It can be expressed as A⋅¬B + ¬A⋅B.
真值表列出了输入的所有组合及其对应的输出。例如，异或运算 A ⊕ B 在A与B不同时输出1，可表示为 A⋅¬B + ¬A⋅B。
| A | B | AND | OR | XOR |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 1 | 0 | 1 | 1 |
| 1 | 0 | 0 | 1 | 1 |
| 1 | 1 | 1 | 1 | 0 |
2. Laws of Boolean Algebra | 布尔代数定律
CIE expects you to recognise and apply the main Boolean laws without proof. The most important ones are:
CIE要求你能够识别并应用主要的布尔定律，无需证明。最重要的定律有：
- Identity Law | 同一律: A + 0 = A, A ⋅ 1 = A
- Null Law | 零律: A + 1 = 1, A ⋅ 0 = 0
- Idempotent Law | 幂等律: A + A = A, A ⋅ A = A
- Inverse Law | 互补律: A + ¬A = 1, A ⋅ ¬A = 0
- Commutative Law | 交换律: A + B = B + A, A ⋅ B = B ⋅ A
- Associative Law | 结合律: (A + B) + C = A + (B + C), (A ⋅ B) ⋅ C = A ⋅ (B ⋅ C)
- Distributive Law | 分配律: A ⋅ (B + C) = A⋅B + A⋅C, A + (B⋅C) = (A+B) ⋅ (A+C)
- Absorption Law | 吸收律: A + A⋅B = A, A ⋅ (A + B) = A
- De Morgan’s Laws | 德摩根定律: ¬(A+B) = ¬A ⋅ ¬B, ¬(A⋅B) = ¬A + ¬B
When simplifying expressions, always break down complex parts, apply De Morgan’s Laws first if negations cover multiple variables, and then use distributive and absorption laws.
化简表达式时，先拆解复杂部分；如果取反覆盖多个变量，优先使用德摩根定律；然后利用分配律和吸收律。
3. De Morgan’s Laws in Depth | 深入理解德摩根定律
De Morgan’s Laws are frequently tested. They allow the transformation of an AND of negations into a NOR, and an OR of negations into a NAND.
德摩根定律是常考内容。它可以把否定与运算转换为或非，把否定或运算转换为与非。
Example: Simplify ¬(¬A + B).
First apply De Morgan: ¬(¬A + B) = ¬(¬A) ⋅ ¬B = A ⋅ ¬B.
This is much simpler and corresponds to the implementation using fewer gates.
例题：化简 ¬(¬A + B)。
首先用德摩根定律：¬(¬A + B) = ¬(¬A) ⋅ ¬B = A ⋅ ¬B。
简化后大幅减少了门的使用。
Always remember to push the bubble (negation) through the expression when applying De Morgan. The law also helps in converting between sum-of-products and product-of-sums forms.
应用德摩根定律时要记住将“气泡”（取反）推过表达式。这一定律也有助于在和之积与积之和形式之间转换。
4. Simplifying Boolean Expressions | 化简布尔表达式
Aim to reduce the number of gates or literals. Use algebraic manipulation step by step. For instance: Simplify F = A⋅B + A⋅B̅ + A̅⋅B.
目标是减少逻辑门或文字的数量。逐步使用代数化简，例如：化简 F = A⋅B + A⋅B̅ + A̅⋅B。
Factorise: A⋅(B + ¬B) + ¬A⋅B = A⋅1 + ¬A⋅B = A + ¬A⋅B.
Then apply distributive and absorption: A + ¬A⋅B = A + B (since A + ¬A⋅B = A + B, by the covering law).
提取公因式：A⋅(B + ¬B) + ¬A⋅B = A⋅1 + ¬A⋅B = A + ¬A⋅B。
再用吸收律和分配律：A + ¬A⋅B = A + B。
Exam tip: show each step clearly with the law used in brackets. This earns full method marks even if the final answer is slightly off.
考试技巧：清晰地写出每一步并标注所用定律。即使最终答案略有偏差，也能得到完整步骤分。
5. Standard Forms: Sum-of-Products and Product-of-Sums | 标准形式：积之和与和之积
Any Boolean function can be written in Sum-of-Products (SOP) or Product-of-Sums (POS) canonical form. SOP is obtained by OR’ing the minterms (product terms) where the output is 1. POS is formed by AND’ing the maxterms (sum terms) where the output is 0.
任何布尔函数都可以写成积之和（SOP）或和之积（POS）的标准形式。SOP通过将输出为1的最小项（乘积项）相或得到。POS通过将输出为0的最大项（和项）相与得到。
For a truth table:
| A | B | F |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
SOP: F = ¬A⋅¬B + A⋅¬B + A⋅B.
POS: F = (A + ¬B) (only one maxterm since only one row gives 0). Always remember that in POS a variable is complemented if it is 1 in that row.
SOP: F = ¬A⋅¬B + A⋅¬B + A⋅B。
POS: F = (A + ¬B)（只有一行输出0，对应一个最大项）。记住：在POS形式中，若该行变量值为1，则取反。
6. Logic Gates and Circuit Diagrams | 逻辑门与电路图
Boolean expressions are physically realised using logic gates. The basic gates are AND, OR, NOT, NAND, NOR, XOR, and XNOR. CIE exams often ask you to draw circuits from expressions, or derive expressions from given gate diagrams.
布尔表达式通过逻辑门来实现。基本门电路包括与门、或门、非门、与非门、或非门、异或门和同或门。CIE考试常要求根据表达式画电路图，或根据给定的门级电路推导表达式。
Note that NAND and NOR are called universal gates because any Boolean function can be implemented using only NAND gates or only NOR gates. This is handy in minimising chip count.
注意：与非门和或非门被称为通用门，因为任何布尔函数都可以仅用与非门或仅用或非门实现。这对减少芯片数量非常有用。
When drawing circuits, use standard symbols: a D-shaped AND, a curved-point OR, and a triangle with a bubble for NOT. In text, we sometimes denote ¬A as A with a bar above it.
画电路时，使用标准符号：与门为D形，或门为弧形尖头，非门为带小圆的三角形。在文本中，我们常用A上划线表示¬A。
7. NAND and NOR Gate Implementation | 与非门和或非门实现
Converting to NAND-only or NOR-only circuits is a common requirement. The procedure for NAND-only: start with an SOP expression, then double-negate the whole function, and use De Morgan to push one negation inward, turning the OR’s into NAND’s.
转换为纯与非门或纯或非门电路是常见要求。纯与非门的转换步骤：从SOP表达式开始，对整个函数进行双重否定，再应用德摩根定律将内层否定推入，把或变成与非。
Example: F = A⋅B + C. Double-negate: F = ¬¬(A⋅B + C) = ¬(¬(A⋅B) ⋅ ¬C). This is two NANDs: one for A⋅B, one for the conjunction of that output with ¬C, but we need to get ¬C from NAND as well: C NAND C = ¬C. Thus the whole circuit can be built with NAND gates only.
例题：F = A⋅B + C。双重否定：F = ¬¬(A⋅B + C) = ¬(¬(A⋅B) ⋅ ¬C)。这就得到了两个与非门：一个用于A⋅B，另一个用于前一个输出与¬C的与非；但¬C也可以用与非门得到：C NAND C = ¬C。因此整个电路可以仅由与非门实现。
8. Karnaugh Maps (K-Maps) | 卡诺图
Karnaugh maps provide a visual method for simplifying Boolean expressions of up to four variables (sometimes five). The CIE syllabus covers 2-, 3-, and 4-variable K-maps. The map is laid out so that adjacent cells differ in only one variable.
卡诺图提供了一种可视化化简布尔表达式的方法，适用于最多四个变量（有时五个）。CIE大纲涵盖二、三、四变量卡诺图。图的布局使相邻单元格只有一个变量不同。
Steps:
1. Draw the grid with Gray code ordering for the variables.
2. Fill in 1s and 0s (or ‘X’ don’t care) from the truth table or expression.
3. Group adjacent 1s (or 0s for POS) in rectangles of size 1, 2, 4, 8, etc. Groups must be power of two sized and wrap around edges.
4. Each group simplifies to the product of variables that remain constant.
5. Sum (OR) all the prime implicants to get the minimal SOP.
步骤：
1. 按格雷码顺序绘制网格。
2. 根据真值表或表达式填入1、0（或无关项’X’）。
3. 将相邻的1（或POS形式的0）圈成大小为1、2、4、8等的矩形。分组必须大小为2的幂，并可跨越边界。
4. 每个分组化简为保持不变的变量之积。
5. 将所有质蕴含项相或得到最简SOP。
Example: a 3-variable K-map for F = ∑(0,1,2,5,6,7). The minimal SOP after grouping is F = ¬A⋅¬B + B⋅C + A⋅C.
例题：三变量卡诺图，F = ∑(0,1,2,5,6,7)。分组后得到最简SOP：F = ¬A⋅¬B + B⋅C + A⋅C。
9. Don’t Care Conditions | 无关条件
Sometimes certain input combinations never occur, or we don’t care about the output. These are don’t care conditions denoted by X. In K-maps, X can be treated as 1 or 0 to help make larger groups, simplifying the expression further.
有时某些输入组合不会出现，或者我们不关心其输出。这些称为无关条件，用X表示。在卡诺图中，X可视为1或0，以帮助形成更大的圈，从而进一步化简表达式。
Exam caution: only include an X in a group if it allows you to make a bigger block that reduces the number of terms or literals. Do not group X’s unnecessarily.
考试注意：仅当把X纳入分组能够形成更大的块从而减少项或文字数时，才将其包含进去。不要无谓地圈X。
10. Half Adders and Full Adders | 半加器与全加器
Boolean algebra directly applies to combinational circuit design. The half adder adds two bits, producing Sum and Carry. Sum = A ⊕ B; Carry = A⋅B. A full adder adds three bits (two operands and a carry-in). Its equations: Sum = A ⊕ B ⊕ Cᵢₙ; Carry Out = A⋅B + (A ⊕ B)⋅Cᵢₙ, or equivalently A⋅B + A⋅Cᵢₙ + B⋅Cᵢₙ.
布尔代数直接应用于组合逻辑电路设计。半加器将两个比特相加，产生和与进位。Sum = A ⊕ B；Carry = A⋅B。全加器将三个比特相加（两个操作数加进位输入），公式：Sum = A ⊕ B ⊕ Cᵢₙ；Carry Out = A⋅B + (A ⊕ B)⋅Cᵢₙ，或等价地 A⋅B + A⋅Cᵢₙ + B⋅Cᵢₙ。
You may be asked to implement these with specific gates or to derive the truth table. Understanding the logic ensures you can tackle any adder-based problem.
可能要求你用指定门实现这些电路，或推导真值表。理解逻辑后，任何基于加法器的问题都能迎刃而解。
11. Using Boolean Algebra to Simplify Logic Circuits | 利用布尔代数化简逻辑电路
A typical exam question provides a logic circuit with several gates and asks for the final Boolean expression, then its simplification, and finally a simpler circuit. Work gate by gate, writing the intermediate outputs.
典型考题会给出一个包含若干门的逻辑电路，要求写出最终布尔表达式，然后化简，最后画出更简单的电路。逐一写出每个门的中间输出即可。
Example: Circuit: A and B go into an AND, output = A⋅B; C and D go into an OR, output = C+D; both feed into a NAND. Final F = ¬((A⋅B) ⋅ (C+D)). Apply De Morgan: F = ¬(A⋅B) + ¬(C+D) = ¬A + ¬B + ¬C⋅¬D. Could be further checked against K-map minimal form.
例题：电路：A和B输入与门，输出A⋅B；C和D输入或门，输出C+D；两者再输入与非门。最终F = ¬((A⋅B) ⋅ (C+D))。应用德摩根：F = ¬(A⋅B) + ¬(C+D) = ¬A + ¬B + ¬C⋅¬D。可进一步用卡诺图验证是否为最简形式。
12. Common Exam Mistakes and Tips | 常见考试错误与技巧
– Mixing up AND and OR representations: Remember that A+B means OR, A⋅B means AND.
– Forgetting parentheses when applying De Morgan’s Law.
– Not extending K-map groups over edges; a group can wrap around.
– Overlooking don’t cares that could simplify the circuit.
– In gate-level implementation, not considering gate fan-in limitations (though rarely asked).
– For full adders, confusing carry-in and carry-out roles.
– 混淆与和或的表达：记住A+B是或，A⋅B是与。
– 应用德摩根定律时忘记括号。
– 卡诺图分组时未利用边界环绕；分组可以跨越边界。
– 忽略了可用于简化电路的无关项。
– 门级实现时未考虑扇入限制（虽不常考）。
– 全加器中混淆进位输入和进位输出的角色。
Practice past paper questions extensively; the Boolean algebra section is highly pattern-based. Always verify simplified expressions by substitution or comparing truth tables.
大量练习历年真题；布尔代数部分高度模式化。化简后一定要用代入法或比对真值表来验证。
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