IB Computer Science: Logic Gates Explained | IB 计算机:逻辑门 考点精讲

📚 IB Computer Science: Logic Gates Explained | IB 计算机:逻辑门 考点精讲

Logic gates are the fundamental building blocks of digital circuits, forming the backbone of all modern computing devices. In IB Computer Science, mastering logic gates means understanding their truth tables, Boolean expressions, circuit symbols, and the methods used to design and simplify combinational logic. This article unpacks every essential concept you need for the exam, from the simplest AND gate to the design of full adders and the simplification of complex expressions using Boolean algebra and Karnaugh maps.

逻辑门是数字电路的基本构建块,构成了现代计算设备的基石。在 IB 计算机科学中,掌握逻辑门意味着要理解其真值表、布尔表达式、电路符号,以及设计和化简组合逻辑的方法。本文将逐一拆解考试所需的每个核心概念,从最简单的与门到全加器的设计,再到运用布尔代数和卡诺图化简复杂表达式,帮助你从容应考。


1. Introduction to Boolean Algebra | 布尔代数简介

Boolean algebra is a mathematical system defined on binary variables that take the values 0 (false, low) or 1 (true, high). It provides the rules for combining and manipulating these variables using logical operators, making it the theoretical foundation of logic gates. In exams, you will be expected to write Boolean expressions, evaluate them for given inputs, and transform them using algebraic laws.

布尔代数是一个定义在二进制变量上的数学系统,变量取值只有 0(假、低电平)和 1(真、高电平)。它提供了用逻辑算子组合和操作这些变量的规则,构成了逻辑门的理论基础。在考试中,你需要能够写出布尔表达式、针对给定输入求值,并运用代数定律进行变换。

  • The three basic operators are AND (conjunction, denoted by · ), OR (disjunction, denoted by + ), and NOT (negation, denoted by a prime ‘ ) .
  • 三种基本运算是与(合取,用 · 表示)、或(析取,用 + 表示)和非(取反,用撇号 ‘ 表示)。
  • Order of precedence: NOT first, then AND, then OR, just as in ordinary algebra where negation acts like parentheses.
  • 优先级顺序:非运算最高,其次是与运算,最后是或运算,与非门、或非门在此基础上结合。

2. Basic Logic Gates: AND, OR, NOT | 基本逻辑门:与门、或门、非门

The AND gate outputs 1 only when all its inputs are 1. The OR gate outputs 1 if at least one input is 1. The NOT gate, also called an inverter, outputs the opposite value of its single input. These three gates form the simplest building blocks of any digital system, and you must be able to reproduce their truth tables and expressions instantly.

与门仅在所有输入都为 1 时输出 1;或门只要至少有一个输入为 1 就输出 1;非门也叫反相器,将单一输入值取反。这三种门构成了所有数字系统最简单的构建块,你必须能够立即写出它们的真值表和表达式。

Gate Boolean Expression Symbol (IEC) Truth Table
AND X = A · B Rectangle with & X=1 only when A=1, B=1
OR X = A + B Rectangle with ≥1 X=1 when A=1 or B=1
NOT X = A’ or ¬A Rectangle with 1 and bubble X=1 when A=0, vice versa

3. Universal Gates: NAND and NOR | 通用门:与非门和或非门

NAND and NOR gates are called universal gates because any Boolean function can be implemented using only NAND gates or only NOR gates. A NAND gate is an AND gate followed by a NOT, and a NOR gate is an OR gate followed by a NOT. Their ability to form all other gates makes them especially important in manufacturing, where standardising on a single gate type reduces cost.

与非门和或非门被称为通用门,因为任何布尔函数都可以仅用与非门或仅用或非门来实现。与非门是与门后面接一个非门,或非门是或门后面接一个非门。由于它们能生成所有其他门,制造商常统一使用单一门类型以降低成本,这使得它们在实际生产中尤为重要。

  • NAND truth table: output is 0 only when both inputs are 1. Expression: X = (A · B)’.
  • 与非门真值表:仅当两个输入都为 1 时输出 0。表达式:X = (A · B)’。
  • NOR truth table: output is 1 only when both inputs are 0. Expression: X = (A + B)’.
  • 或非门真值表:仅当两个输入都为 0 时输出 1。表达式:X = (A + B)’。
  • Common exam task: using NAND gates to build an AND, OR, or NOT function. For example, a NAND with both inputs tied together acts as a NOT.
  • 常见考题任务:用与非门构建与、或、非功能。例如,将与非门的两个输入端并接在一起,就相当于一个非门。

4. Exclusive Gates: XOR and XNOR | 异或门和同或门

The XOR (exclusive OR) gate outputs 1 when an odd number of inputs are 1 – for a 2-input gate, when the inputs differ. The XNOR (exclusive NOR) gate outputs 1 when the inputs are equal. These gates are critical in arithmetic circuits such as adders and parity checkers, and you will frequently see them in IB questions on half and full adders.

异或门(XOR)当输入中 1 的个数为奇数时输出 1——对于两输入门,即输入不同时输出 1。同或门(XNOR)在输入相同时输出 1。这些门在加法器和奇偶校验器等算术电路中至关重要,在 IB 考试中,半加器和全加器的题目中会频繁出现。

A B XOR Q XNOR Q
0 0 0 1
0 1 1 0
1 0 1 0
1 1 0 1

Boolean expressions: XOR is commonly written as A ⊕ B, which equates to A·B’ + A’·B. XNOR is A ⊙ B, equal to A·B + A’·B’. Remember that XOR can be built from four NAND gates, a favourite exam construction.

布尔表达式:XOR 常写作 A ⊕ B,等价于 A·B’ + A’·B;XNOR 是 A ⊙ B,等于 A·B + A’·B’。记住异或门可以用四个与非门实现,这是考试中常见的构建题。


5. Truth Tables and Logic Expressions | 真值表和逻辑表达式

A truth table lists every possible combination of inputs and the resulting output for a logic circuit. In IB exams, you may be asked to complete a given truth table, to derive a Boolean expression from a truth table, or to draw a circuit that matches a truth table. The relationship between the truth table and the sum-of-products (SOP) expression is key: each line that outputs 1 gives a product term of either the normal or complemented variables.

真值表列出了逻辑电路的所有可能输入组合及其对应的输出。在 IB 考试中,你可能需要补全给定的真值表、从真值表推导布尔表达式,或绘制匹配真值表的电路。真值表与积之和(SOP)表达式之间的关系至关重要:每一个输出为 1 的行对应一个由原变量或反变量构成的产品项。

  • For a circuit with n inputs, the truth table has 2n rows.
  • 对于有 n 个输入的电路,真值表有 2n 行。
  • When converting truth table to expression, focus on rows where output is 1: write the product as A (if input is 1) or A’ (if input is 0), then sum all these products.
  • 将真值表转换为表达式时,聚焦于输出为 1 的行:若输入为 1 则写 A,若为 0 则写 A’,最终将所有产品项相加。
  • Example: F = A’B’C + A’BC’ + ABC is a valid SOP expression.
  • 示例:F = A’B’C + A’BC’ + ABC 便是一个有效的积之和表达式。

6. Combining Gates: Logic Circuits | 门电路组合:逻辑电路

Real digital systems combine multiple gates into logic circuits that execute more complex functions. To analyse such a circuit, you work from inputs to outputs, obtaining intermediate expressions and finally a single output expression. IB questions often provide a diagram and ask you to write the Boolean expression or complete the truth table, so precision in tracing signals step by step is essential.

真实的数字系统将多个门组合成逻辑电路,以执行更复杂的函数。分析这类电路时,需要从输入端向输出端逐步推导,获取中间表达式,最后得到单一输出表达式。IB 题目常给出电路图,要求写出布尔表达式或补全真值表,因此按步骤准确追踪信号至关重要。

  • Label intermediate points to avoid mistakes. Even if a gate symbol differs from the classic shape, the logic remains the same.
  • 为中间节点标上标签以避免错误。即使门符号不同于传统形状,逻辑功能不变。
  • If two inputs to an AND gate come from two different sub-circuits, first write expressions for those sub-circuits, then combine with AND.
  • 如果一个与门的两个输入来自不同的子电路,先写出这些子电路的表达式,再用与运算组合。
  • Always simplify your final expression after derivation, as exams often require ‘in its simplest form’.
  • 推导出最终表达式后,一定要化简,因为考试通常要求“最简形式”。

7. Simplification using Boolean Algebra | 使用布尔代数化简

Boolean algebra provides a set of laws – commutative, associative, distributive, identity, complement, and De Morgan’s laws – that allow you to reduce a complex expression to a simpler, equivalent form. Simplifying circuits reduces the number of gates, which is vital for cost, speed, and power consumption. IB questions may explicitly ask you to simplify a given Boolean expression, so you must be fluent with the algebraic manipulations.

布尔代数提供了一套定律——交换律、结合律、分配律、恒等律、互补律和德摩根定律——可以将复杂表达式化简为更简单的等价形式。化简电路能减少门数,这对于成本、速度和功耗都至关重要。IB 考题可能明确要求化简给定的布尔表达式,因此你必须熟练进行代数变换。

Law Form
Identity A + 0 = A,   A·1 = A
Complement A + A’ = 1,   A·A’ = 0
Distributive A·(B+C) = A·B + A·C,   A + (B·C) = (A+B)·(A+C)
De Morgan (A·B)’ = A’ + B’,   (A+B)’ = A’·B’

Always break large bars using De Morgan’s theorem before simplifying further. A common technique is to factor terms and then eliminate with complement and identity laws.

在进行化简之前,务必先用德摩根定理拆分长反号。常用技巧是提取公因子,然后利用互补律和恒等律消去项。


8. Karnaugh Maps (K-Maps) | 卡诺图

Karnaugh maps provide a visual way to minimise Boolean expressions for up to four variables. They arrange truth table rows in a grid so that adjacent cells differ by only one variable, allowing you to spot and group 1s to form the simplest SOP expression. K-maps appear in IB HL content and are a powerful tool when algebraic simplification becomes unwieldy.

卡诺图为最多四个变量的布尔表达式化简提供了一种可视化方法。它将真值表行排列成网格,使相邻单元格仅有一个变量不同,从而能够通过观察和分组 1 来形成最简积之和表达式。卡诺图属于 IB HL 内容,在代数化简变得繁琐时,它是一个强大的工具。

  • For a 3-variable K-map, label columns as 00, 01, 11, 10 (Gray code) and rows as 0, 1.
  • 对于三变量卡诺图,列标为 00, 01, 11, 10(格雷码),行标为 0, 1。
  • Groups must be rectangles of size 1, 2, 4, or 8 cells; a group eliminates the variable that changes within the group.
  • 组必须是大小为 1、2、4 或 8 的矩形;如果一个变量在组内发生变化,则该变量被消去。
  • Essential prime implicants are those groups that cover at least one 1 not covered by any other group; include them first.
  • 必要质蕴含项是覆盖至少一个未被其他组覆盖的 1 的那些组,应优先选取。

9. Application: Half & Full Adders | 应用:半加器和全加器

Adders are a classic application of logic gates. A half adder adds two single-bit numbers and produces a sum (S) and a carry (C). A full adder adds three bits – two input bits and a carry-in – producing a sum and a carry-out. These circuits illustrate XOR, AND, and OR combinations perfectly, and exam questions often require you to draw, analyse, or extend them.

加法器是逻辑门的经典应用。半加器将两个一位二进制数相加,产生和(S)与进位(C)。全加器将三个位——两个输入位和一个进位输入——相加,产生和与进位输出。这些电路完美地展示了异或、与和或门的组合,考题常要求你绘制、分析或扩展它们。

Half Adder: S = A ⊕ B,   C = A · B

半加器:S = A ⊕ B,C = A · B

Full Adder: S = A ⊕ B ⊕ Cin,   Cout = (A · B) + (Cin · (A ⊕ B))

全加器:S = A ⊕ B ⊕ Cin,Cout = (A · B) + (Cin · (A ⊕ B))

You should be able to derive these expressions from the truth table and to build a multi-bit ripple adder by cascading full adders.

你应当能从真值表推导出这些表达式,并能通过级联全加器构建多位行波进位加法器。


10. Common Exam Question Types | 常见考题形式

IB Computer Science assessments present logic gate questions in several recurring formats. Recognising these patterns helps you prepare efficiently. You might be given a circuit diagram and asked to write its Boolean expression, or you may need to complete a truth table from a described behaviour. Another typical task is to design a circuit from a given truth table using only certain gate types.

IB 计算机科学考试会以几种反复出现的形式考查逻辑门。识别这些模式有助于高效备考。你可能拿到一个电路图,要求写出其布尔表达式;或者需要根据描述的行为补全真值表。另一种典型任务是仅使用指定门类型,根据给定真值表设计电路。

  • Type 1: Given logic diagram → find output expression & truth table.
  • 题型一:给定逻辑图 → 求输出表达式和真值表。
  • Type 2: Given problem description (e.g., ‘output 1 when exactly two inputs are 1’) → truth table → expression → circuit.
  • 题型二:给定问题描述(如“当恰好两个输入为 1 时输出 1”)→ 真值表 → 表达式 → 电路。
  • Type 3: Simplification from a given expression or K-map.
  • 题型三:根据给定表达式或卡诺图进行化简。
  • Type 4: Half/single-bit adder design and cascading.
  • 题型四:半加器/全加器设计及级联。

11. Tips & Tricks | 小贴士

Accuracy in truth tables is non-negotiable; check that you have 2n rows and that the binary sequence follows ascending order (or Gray code where required). When drawing circuits, use clean, unambiguous symbols – the IB mark scheme accepts both the distinctive-shape symbols and the rectangular IEC symbols, but be consistent. For simplification, always double-check by substituting test values into both original and simplified expressions to ensure equivalence.

真值表的准确性不容有失;请确保有 2n 行,且二进制序列按升序排列(或按要求使用格雷码)。绘制电路时,使用清晰、无歧义的符号——IB 评分标准接受独特形状符号和矩形 IEC 符号,但请保持一致。化简时,务必通过代入测试值比较原始表达式和化简后表达式,确保二者等价。

  • Use brackets generously in written expressions to avoid order-of-operations errors.
  • 在书写表达式时,大量使用括号以避免优先级错误。
  • If a circuit seems overly complex, redraw it after simplifying the Boolean expression first.
  • 如果电路看起来过于复杂,可先化简布尔表达式再重新绘制。
  • Memorise that XOR = (A + B) · (A·B)’, which is sometimes easier to implement with universal gates.
  • 记住 XOR = (A + B) · (A·B)’,有时用通用门更容易实现。

12. Summary | 总结

Mastering logic gates for IB Computer Science requires fluency with seven core gates, the ability to translate seamlessly between truth tables, Boolean expressions, and circuit diagrams, and skill in simplifying using both algebraic laws and Karnaugh maps. By focusing on these areas and practising the common question types, you will gain the confidence to tackle any logic gate problem that appears on the exam. Always link theory to practical circuits, such as the half and full adder, to see how logic gates power entire computer systems.

要掌握 IB 计算机科学中的逻辑门,需要熟练掌握七种核心门,能够在真值表、布尔表达式和电路图之间无缝转换,并具备使用代数定律和卡诺图进行化简的技能。集中攻克这些领域并训练常见题型,你将自信地应对考试中出现的任何逻辑门问题。始终将理论与实践电路(如半加器和全加器)相联系,才能深刻理解逻辑门如何驱动整个计算机系统。

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