📚 Logic Gates | IGCSE Edexcel Computer Science Revision | 逻辑门考点精讲
Logic gates are the fundamental building blocks of digital circuits. They process binary inputs (0 or 1) and produce a single binary output based on a specific logical rule. In the IGCSE Edexcel Computer Science specification, you need to understand the function, truth table, and circuit symbol of six main gates: NOT, AND, OR, NAND, NOR, and XOR. You must also be able to combine gates into simple logic circuits, derive Boolean expressions, and apply truth tables to analyse the behaviour of a circuit.
逻辑门是数字电路的基本构建块。它们处理二进制输入（0 或 1），并根据特定的逻辑规则产生单一的二进制输出。在 IGCSE Edexcel 计算机科学考试大纲中，你需要理解六种主要逻辑门的功能、真值表和电路符号：非门、与门、或门、与非门、或非门和异或门。你还必须能够将逻辑门组合成简单的逻辑电路，推导布尔表达式，并应用真值表来分析电路的行为。
1. The Concept of Binary Logic | 二进制逻辑的概念
All logic gates operate on binary signals. A voltage near 0 V typically represents a logical 0 (FALSE), while a voltage near the supply voltage (e.g., 5 V) represents a logical 1 (TRUE). The behaviour of a gate is defined by a truth table, which lists all possible input combinations and the corresponding output.
所有逻辑门都基于二进制信号工作。接近 0 V 的电压通常表示逻辑 0（假），而接近电源电压（例如 5 V）的电压表示逻辑 1（真）。逻辑门的行为由真值表定义，真值表列出了所有可能的输入组合及对应的输出。
- Inputs and outputs are binary digits (bits). 输入和输出都是二进制位（比特）。
- A truth table has 2ⁿ rows for n inputs. 有 n 个输入的真值表有 2ⁿ 行。
- Boolean algebra is the mathematical notation used to describe gate operations. 布尔代数是一种用于描述逻辑门运算的数学符号系统。
2. NOT Gate (Inverter) | 非门（反相器）
The NOT gate has one input and one output. It inverts the input signal: when the input is 0, the output is 1; when the input is 1, the output is 0. The Boolean expression is simply Q = NOT A, often written as Q = Ā.
非门有一个输入端和一个输出端。它将输入信号取反：当输入为 0 时，输出为 1；当输入为 1 时，输出为 0。布尔表达式就是 Q = NOT A，通常写作 Q = Ā。
Truth table (真值表):
| A | Q |
|---|---|
| 0 | 1 |
| 1 | 0 |
The symbol is a triangle with a small circle (bubble) at the output. 符号是一个三角形，输出端有一个小圆圈（气泡）。
3. AND Gate | 与门
The AND gate has two or more inputs. The output is 1 only when all inputs are 1. Otherwise, the output is 0. The Boolean expression for a two-input AND gate is Q = A AND B, written as Q = A · B.
与门有两个或多个输入端。只有当所有输入都为 1 时，输出才为 1。否则，输出为 0。二输入与门的布尔表达式为 Q = A AND B，写作 Q = A · B。
Truth table for two inputs (二输入真值表):
| A | B | Q |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
Think of an AND gate like a series circuit: both switches must be closed for the lamp to light. 与门好比串联电路：两个开关都必须闭合，灯才能亮。
4. OR Gate | 或门
The OR gate also has two or more inputs. The output is 1 if at least one input is 1. The output is 0 only when all inputs are 0. The Boolean expression is Q = A OR B, written as Q = A + B.
或门也有两个或多个输入端。只要至少有一个输入为 1，输出就为 1。只有当所有输入都为 0 时，输出才为 0。布尔表达式为 Q = A OR B，写作 Q = A + B。
Truth table for two inputs:
| A | B | Q |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
An OR gate resembles a parallel circuit: closing any of the switches completes the circuit. 或门类似于并联电路：闭合任意一个开关都能接通电路。
5. NAND Gate (NOT AND) | 与非门
A NAND gate is an AND gate followed by a NOT gate. Its output is the inverse of the AND output. The output is 0 only when all inputs are 1; otherwise, it is 1. The Boolean expression is Q = NOT (A AND B), written as Q = A · B with a bar over the whole term.
与非门是一个与门后面接一个非门。它的输出是与门输出的反相。只有当所有输入都为 1 时，输出才为 0；否则输出为 1。布尔表达式为 Q = NOT (A AND B)，写作 Q = A · B 整个项上有横线。
Truth table:
| A | B | Q |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
NAND gates are called ‘universal gates’ because any other gate can be built using only NAND gates. 与非门被称为“通用门”，因为仅使用与非门就可以构建出任何其他门。
6. NOR Gate (NOT OR) | 或非门
A NOR gate is an OR gate followed by a NOT gate. The output is 1 only when all inputs are 0; otherwise, the output is 0. The Boolean expression is Q = NOT (A OR B), written as Q = A + B with a bar over the whole term.
或非门是一个或门后面接一个非门。只有当所有输入都为 0 时，输出才为 1；否则输出为 0。布尔表达式为 Q = NOT (A OR B)，写作 Q = A + B 整个项上有横线。
Truth table:
| A | B | Q |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
NOR gates are also universal. Like NAND, they can be used to implement any logic function. 或非门也是通用门。和与非门一样，它们可以用来实现任何逻辑功能。
7. XOR Gate (Exclusive OR) | 异或门
The XOR gate outputs 1 if the inputs are different, and 0 if they are the same. For two inputs, the output is 1 when exactly one input is 1. The Boolean expression is Q = A XOR B, often written as Q = A ⊕ B.
异或门在输入不同时输出 1，在输入相同时输出 0。对于两个输入，当恰好一个输入为 1 时输出为 1。布尔表达式为 Q = A XOR B，常写作 Q = A ⊕ B。
Truth table:
| A | B | Q |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
An alternative Boolean expression is Q = A · B̄ + Ā · B. XOR is widely used in arithmetic circuits, such as adders. 另一种布尔表达式是 Q = A · B̄ + Ā · B。异或门广泛应用于算术电路，例如加法器。
8. Gate Symbols (Edexcel Standard) | 逻辑门符号（Edexcel 标准）
You must be able to recognise and draw the standard symbols used in the Edexcel specification. These are the distinctively shaped symbols (not the rectangular IEC ones).
你必须能够识别并绘制 Edexcel 考试大纲中使用的标准符号。这些是形状独特的符号（不是矩形 IEC 符号）。
- NOT: triangle with a bubble at the tip. 非门：尖端带小圆圈的三角形。
- AND: D-shaped with flat back and round front. 与门：背部平直、前端为弧形的 D 形。
- OR: shield shape curving to a point at the output, with a concave back. 或门：背部内凹、输出端收尖的盾形。
- NAND: AND symbol with a bubble at the output. 与非门：与门符号输出端加小圆圈。
- NOR: OR symbol with a bubble at the output. 或非门：或门符号输出端加小圆圈。
- XOR: OR symbol with an extra curved line on the input side and a bubble at the output (if Edexcel uses the traditional XOR symbol). Note that Edexcel sometimes uses the standard OR symbol with an added line; check your textbook. 异或门：或门符号输入端多加一条弧线，输出端加小圆圈（如果 Edexcel 使用传统的异或符号）。注意 Edexcel 有时使用标准或门符号加一条线；请查阅教材。
Accurate drawing of symbols is often tested. 对符号的准确绘制经常是测试内容。
9. Constructing Truth Tables for Combined Circuits | 为组合电路构建真值表
When logic gates are connected, you construct a truth table by labelling intermediate points and working step by step. For a circuit with n external inputs, create a table with n input columns. Add a column for each intermediate output, and finally the overall output. Fill in all input combinations (0 to 2ⁿ-1 in binary). Then compute intermediate outputs using the truth tables of each gate.
当逻辑门连接在一起时，你需要通过标注中间点并逐步计算来构建真值表。对于有 n 个外部输入的电路，创建一个包含 n 个输入列的表格。为每个中间输出添加一列，最后是总输出。填入所有输入组合（二进制 0 到 2ⁿ-1）。然后使用每个门的真值表计算中间输出。
Example circuit: A and B are inputs to an AND gate; the output of the AND gate is fed into a NOT gate, producing Q. 示例电路：A 和 B 是一个与门的输入；与门的输出送入一个非门，产生 Q。
Truth table construction steps (真值表构建步骤):
Step 1: List inputs A, B. Step 2: Add column for AND output: C = A · B. Step 3: Add column for Q = NOT C. Step 4: Evaluate for A,B = 00, 01, 10, 11.
This systematic approach guarantees no combination is missed. 这种系统方法可确保不遗漏任何组合。
10. Deriving Boolean Expressions from Circuits | 从电路推导布尔表达式
Start from the inputs and move towards the output, writing the Boolean sub-expression at each gate’s output. Use brackets to indicate the order of operations. For example, an AND gate with inputs A and B followed by an OR gate with the AND output and a third input C yields: Q = (A · B) + C.
从输入开始，朝着输出方向前进，在每个门的输出端写出布尔子表达式。使用括号来表示运算顺序。例如，一个与门有输入 A 和 B，其输出和一个输入 C 送入或门，则得到：Q = (A · B) + C。
When a NOT gate is present, place a bar over the affected variable or sub-expression. For instance, if the output of the AND gate above is inverted before the OR, you write Q = (A · B)̄ + C.
当有非门时，在受影响的变量或子表达式上加横线。例如，如果上述与门的输出在进入或门之前被反相，则写作 Q = (A · B)̄ + C。
Practice translating between circuit diagrams and Boolean expressions is essential for the exam. 在考试中，练习在电路图和布尔表达式之间进行转换至关重要。
11. Drawing Logic Circuits from Boolean Expressions | 根据布尔表达式绘制逻辑电路
Given a Boolean expression, you can draw a logic circuit by identifying the operations. In an expression like Q = (Ā + B) · C, the bar over A means a NOT gate on A. The plus sign means an OR gate combining Ā and B. The dot means an AND gate with the OR output and C.
给定一个布尔表达式，你可以通过识别运算来绘制逻辑电路。在像 Q = (Ā + B) · C 这样的表达式中，A 上的横线表示 A 接非门。加号表示将 Ā 和 B 组合的或门。点号表示将或门输出和 C 组合的与门。
Circuit drawing sequence (电路绘制顺序):
- Draw a NOT gate for A, output labelled Ā. 为 A 画一个非门，输出标记为 Ā。
- Draw an OR gate with inputs Ā and B. 画一个输入为 Ā 和 B 的或门。
- Draw an AND gate with inputs from the OR output and C. 画一个与门，输入来自或门输出和 C。
- The output of the AND gate is Q. 与门的输出就是 Q。
Always use the correct symbols and clearly label all inputs, outputs, and intermediate points. 始终使用正确的符号，并清楚地标记所有输入、输出和中间点。
12. Simplifying Logic Expressions Using Boolean Algebra | 使用布尔代数化简逻辑表达式
While not always heavily examined, basic simplification rules can help you analyse circuits. Key identities include:
虽然不总是大量考查，但基本的化简规则有助于你分析电路。关键恒等式包括：
A · 0 = 0, A · 1 = A, A · A = A, A · Ā = 0
A + 0 = A, A + 1 = 1, A + A = A, A + Ā = 1
De Morgan’s Laws are also useful:
德摩根定律也很有用：
(A · B)̄ = Ā + B̄ and (A + B)̄ = Ā · B̄
These laws help you transform a NAND gate into an OR gate with inverted inputs, which is crucial for understanding gate universality. 这些定律帮助你将从与非门转换为带反相输入的或门，这对于理解门的通用性至关重要。
Applying these rules can reduce the number of gates needed in a circuit, saving cost and power. 应用这些规则可以减少电路中所需门的数量，从而节省成本和功耗。
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