IGCSE OCR Computer Science Unit Test Paper: Systems Architecture | IGCSE OCR 计算机科学单元测试卷：系统架构

📚 IGCSE OCR Computer Science Unit Test Paper: Systems Architecture | IGCSE OCR 计算机科学单元测试卷：系统架构

This unit test focuses on the “Systems Architecture” topic from the IGCSE OCR Computer Science specification. It is designed to assess your understanding of the CPU, the Von Neumann architecture, the fetch-decode-execute cycle, and factors affecting processor performance. Work through the questions, check the provided answers and explanations, and use the revision tips to strengthen your knowledge for the real exam.

本单元测试卷聚焦于 IGCSE OCR 计算机科学大纲中的“系统架构”主题。它旨在评估你对 CPU、冯·诺依曼架构、取指-解码-执行周期以及影响处理器性能的因素的理解。请完成题目，核对给出的答案与解析，并结合备考建议巩固知识，为实考做好准备。

1. Multiple Choice Questions (MCQs) | 选择题

This section contains five multiple choice questions. Select the best answer for each question. They target core definitions and basic components of computer architecture.

本部分包含五道选择题。请为每道题选择最佳答案。这些题目针对计算机架构的核心定义与基本组件。

Q1. What is the primary purpose of the Central Processing Unit (CPU)?
A) To permanently store files and documents
B) To execute instructions and process data
C) To provide a graphical user interface
D) To manage the power supply of the computer

Q1. 中央处理器 (CPU) 的主要用途是什么？
A) 永久存储文件和文档
B) 执行指令和处理数据
C) 提供图形用户界面
D) 管理计算机的电源

Q2. Which component inside the CPU is responsible for carrying out arithmetic calculations and logical comparisons?
A) Control Unit (CU)
B) Arithmetic Logic Unit (ALU)
C) Program Counter (PC)
D) Memory Address Register (MAR)

Q2. CPU 内部的哪个组件负责执行算术运算和逻辑比较？
A) 控制单元 (CU)
B) 算术逻辑单元 (ALU)
C) 程序计数器 (PC)
D) 内存地址寄存器 (MAR)

Q3. Which statement about the Von Neumann architecture is true?
A) It uses separate memory units for data and instructions.
B) Data and instructions are stored in the same main memory.
C) All instructions are executed without a clock signal.
D) It does not require a control unit.

Q3. 下列关于冯·诺依曼架构的说法，哪一项是正确的？
A) 它使用独立的存储单元存放数据和指令。
B) 数据和指令存放在同一主存储器中。
C) 所有指令无需时钟信号即可执行。
D) 它不需要控制单元。

Q4. What does the Program Counter (PC) hold during the fetch-decode-execute cycle?
A) The opcode of the current instruction
B) The result of the last ALU operation
C) The memory address of the next instruction to be fetched
D) The data that has just been fetched from memory

Q4. 在取指-解码-执行周期中，程序计数器 (PC) 中存有什么？
A) 当前指令的操作码
B) ALU 上一次操作的结果
C) 下一条待取指令的内存地址
D) 刚从内存中取出的数据

Q5. Which type of memory is typically used for cache memory in modern CPUs due to its high speed?
A) Dynamic RAM (DRAM)
B) Static RAM (SRAM)
C) Flash memory
D) Magnetic disk storage

Q5. 现代 CPU 中的高速缓存 (cache) 通常使用哪种类型的内存？
A) 动态随机存取存储器 (DRAM)
B) 静态随机存取存储器 (SRAM)
C) 闪存
D) 磁盘存储器

2. MCQs Answers & Explanations | 选择题答案与解析

Below you will find the correct answers and detailed explanations for each multiple choice question. Study these carefully to clarify any misconceptions about the basic building blocks of the CPU.

以下是每道选择题的正确答案与详细解析。请仔细学习，澄清你对 CPU 基本构件的任何误解。

Q1 Answer: B
The CPU is often called the “brain” of the computer. Its main role is to fetch, decode, and execute program instructions, processing data as required. Storage (option A) is the role of secondary or primary memory, not the processor.

Q1 答案：B
CPU 常被称为计算机的“大脑”。其主要作用是取指、解码并执行程序指令，并按需处理数据。存储功能（选项 A）属于辅助存储器或主存储器，而非处理器。

Q2 Answer: B
The Arithmetic Logic Unit (ALU) performs all arithmetic operations (addition, subtraction, etc.) and logical operations (AND, OR, NOT, comparisons). The Control Unit decodes instructions and directs traffic, the Program Counter tracks addresses, and the MAR holds the address for memory access.

Q2 答案：B
算术逻辑单元 (ALU) 执行所有算术运算（加、减等）和逻辑运算（与、或、非、比较）。控制单元负责解码指令并指挥数据流，程序计数器跟踪地址，而 MAR 保存内存访问地址。

Q3 Answer: B
The key characteristic of the Von Neumann architecture is that both program instructions and data share the same memory space and a single bus system. This is the stored-program concept. The other choices contradict this fundamental idea.

Q3 答案：B
冯·诺依曼架构的关键特征是程序指令和数据共享同一内存空间和单一总线系统。这就是存储程序概念。其他选项均与这一基本思想相悖。

Q4 Answer: C
During the fetch stage, the Program Counter contains the address of the next instruction to be read from memory. After fetching, the PC is incremented to point to the subsequent instruction. The opcode (A) is extracted later, and data handling falls to other registers.

Q4 答案：C
在取指阶段，程序计数器保存着下一条要从内存中读取的指令的地址。取指完成后，PC 会递增以指向下一条指令。操作码（A）会在稍后被提取，而数据则由其他寄存器处理。

Q5 Answer: B
Cache memory requires very fast access times, and Static RAM (SRAM) is used because it is faster than Dynamic RAM (DRAM). SRAM does not need to be refreshed as frequently, making it ideal for cache, although it is more expensive and consumes more space per bit.

Q5 答案：B
高速缓存需要极快的访问时间，因此使用静态 RAM (SRAM)，因为它比动态 RAM (DRAM) 更快。SRAM 无需频繁刷新，这使其成为缓存的理想选择，尽管它更昂贵且每比特占用更多面积。

3. Short Answer Questions | 简答题

These three short answer questions assess your ability to explain key processes and distinguish between hardware components. Aim for precise technical language and use correct terminology.

以下三道简答题考查你解释关键流程以及区分硬件组件的能力。请使用准确的技术语言和正确的术语作答。

Q6. Describe the steps that occur during the fetch stage of the fetch-decode-execute cycle. You may refer to registers in your answer.

Q6. 描述取指-解码-执行周期中取指阶段发生的各个步骤。你可以在答案中提及相关寄存器。

Q7. State two differences between RAM (Random Access Memory) and ROM (Read Only Memory) in terms of volatility and typical use.

Q7. 从易失性和典型用途两个方面，陈述 RAM（随机存取存储器）和 ROM（只读存储器）之间的两个区别。

Q8. Explain the role of the Control Unit (CU) within the CPU. Your answer should include how it interacts with other components during the decode stage.

Q8. 解释 CPU 内部控制单元 (CU) 的作用。你的答案应包括它在解码阶段与其他组件的交互方式。

4. Short Answer Model Solutions | 简答题参考答案

Model answers for the short answer questions are provided below. Notice how each response uses precise technical terms and directly addresses the command words like “describe”, “state”, and “explain”.

简答题的参考答案如下。注意每个回答如何使用精确的技术术语，并直接回应“描述”、“陈述”和“解释”等指令词。

Q6 Model Answer:
During the fetch stage, the Program Counter (PC) holds the address of the next instruction. This address is copied to the Memory Address Register (MAR) and sent to the memory via the address bus. The Control Unit then sends a read signal along the control bus. The instruction stored at that address is retrieved from memory and placed into the Memory Data Register (MDR). Finally, the instruction is transferred to the Current Instruction Register (CIR) for decoding. The PC is then incremented to point to the following instruction.

Q6 参考答案：
在取指阶段，程序计数器 (PC) 保存着下一条指令的地址。该地址被复制到内存地址寄存器 (MAR)，并通过地址总线发送到内存。随后控制单元通过控制总线发出读取信号。存放在该地址的指令从内存中取出，放入内存数据寄存器 (MDR)。最后，该指令被转移到当前指令寄存器 (CIR) 以进行解码。之后，PC 递增以指向下一条指令。

Q7 Model Answer:
Difference 1: RAM is volatile, meaning it loses its contents when power is turned off, whereas ROM is non-volatile and retains its data permanently.
Difference 2: RAM is typically used to store the programs and data currently in use by the operating system and applications, while ROM is used to store firmware, such as the BIOS or boot loader, which starts the computer.

Q7 参考答案：
区别一：RAM 是易失性的，即断电后内容会丢失；而 ROM 是非易失性的，可永久保留数据。
区别二：RAM 通常用于存储操作系统和应用程序正在使用的程序及数据；ROM 则用于存储固件，例如用于启动计算机的 BIOS 或引导加载程序。

Q8 Model Answer:
The Control Unit is responsible for managing the execution of instructions. During the decode stage, it receives the instruction from the Current Instruction Register. The CU decodes the instruction’s opcode to determine what operation must be performed. It then coordinates the other components by sending control signals to the ALU (if arithmetic is needed), to the registers, and to memory, ensuring data flows to the correct places at the correct times. It acts like a conductor in an orchestra, directing traffic without performing data processing itself.

Q8 参考答案：
控制单元负责管理指令的执行。在解码阶段，它从当前指令寄存器接收指令。CU 对指令的操作码进行解码，以确定需要执行何种操作。然后，它通过向 ALU（如果需要算术运算）、寄存器和内存发送控制信号来协调其他组件，确保数据在正确的时间流向正确的位置。它的作用类似于乐队的指挥，负责调度却并不亲自处理数据。

5. Extended Response Question | 拓展题

This 6‑mark question requires a well-structured discussion linking hardware specifications to real-world performance. You should include relevant examples and use correct terminology to achieve full marks.

这道 6 分题需要你条理清晰地讨论硬件规格与实际性能之间的关系。你应该包含相关示例并使用正确术语以获得满分。

Q9. A computer enthusiast wants to upgrade their desktop PC for faster video editing. They are considering a new CPU with a higher clock speed, more cores, and a larger cache. Discuss how each of these three factors – clock speed, number of cores, and cache size – can improve the performance of the CPU. (6 marks)

Q9. 一位电脑爱好者希望升级台式机以加快视频编辑速度。他们正在考虑一款具有更高时钟速度、更多核心和更大缓存的新 CPU。请分别讨论时钟速度、核心数量和缓存大小这三个因素如何提升 CPU 的性能。（6 分）

6. Extended Response Mark Scheme & Exemplar | 拓展题评分标准与范例

The response is marked against three main performance areas. Below is a banded mark scheme and a top-band exemplar response to show you exactly what examiners expect for a full‑mark answer.

该题的评分围绕三个主要性能领域。以下是一个分档评分标准和一个最高分范例，准确展示阅卷人对满分答案的期望。

Factor	Explanation (English)	中文说明
Clock Speed	Higher clock speed (measured in GHz) means the CPU can execute more cycles per second. Each cycle allows an instruction to progress, so more instructions can be completed in the same time. This directly increases processing speed for single-threaded tasks.	更高的时钟速度（以 GHz 为单位）意味着 CPU 每秒可以执行更多时钟周期。每个周期可推进一条指令的进展，因此相同时间内可完成更多指令，直接提升单线程任务的处理速度。
Number of Cores	Multiple cores allow true parallel processing. A video editing application can be split into multiple threads and assigned to different cores simultaneously. For example, one core can render a video clip while another applies a filter, greatly reducing overall rendering time.	多核允许真正的并行处理。视频编辑应用可被分成多个线程，同时分配给不同核心。例如，一个核心渲染视频片段，另一个应用滤镜，能大幅减少总渲染时间。
Cache Size	A larger cache (very fast SRAM) stores frequently accessed instructions and data closer to the CPU, reducing the need to fetch from slower main memory (DRAM). For video editing, where the same filters and codecs are used repeatedly, a bigger cache reduces latency and improves throughput.	更大的缓存（高速 SRAM）可将常用指令和数据存放在离 CPU 更近的位置，减少从较慢的主存（DRAM）取数的需求。对反复使用相同滤镜和编解码器的视频编辑而言，更大缓存降低了延迟，提升了吞吐量。

Top-band exemplar response (6 marks):
A higher clock speed, e.g., moving from 3.2 GHz to 4.5 GHz, increases the number of fetch-decode-execute cycles that can be completed each second, directly speeding up any task that relies on raw processing power. More cores enable multitasking and parallel processing, which is particularly beneficial for video editing software designed to split rendering across several cores simultaneously. Finally, a larger CPU cache stores frequently used instructions and data closer to the processor, reducing the average time to access data from main memory. In video editing, where the same encoding algorithms are called repeatedly, this reduces stall cycles and further increases performance. Together, these upgrades can drastically shorten export and preview times.

最高分范例回答（6 分）：
更高的时钟速度（例如从 3.2 GHz 提升到 4.5 GHz）增加了每秒可完成的取指-解码-执行周期数，直接为任何依赖原始算力的任务提速。更多的核心支持多任务和并行处理，这对于设计为跨多核同时渲染的视频编辑软件尤为有利。最后，更大的 CPU 缓存将常用指令和数据存放在更靠近处理器的位置，减少了从主存访问数据的平均时间。在需要重复调用相同编码算法的视频编辑中，这减少了停滞周期，进一步提升了性能。这三项升级共同作用，可大幅缩短导出和预览时间。

7. Common Mistakes & Misconceptions | 常见错误与误解

Many students lose marks by confusing similar registers or by providing vague explanations. The most frequent mistakes are listed below so you can avoid them in your own test.

许多学生因混淆相似的寄存器或提供模糊解释而失分。下面列出最常犯的错误，以便你在自己的测试中加以规避。

Mistake 1: Confusing the MAR and MDR. Many write that the MAR holds the data itself. In reality, the Memory Address Register stores the address, while the Memory Data Register stores the actual data value that has been read or is to be written.

错误一：混淆 MAR 与 MDR。许多人写下 MAR 存放数据本身。实际上，内存地址寄存器存储的是地址，而内存数据寄存器存储的是刚刚读取或待写入的实际数据值。

Mistake 2: Believing that more cores always double the speed. Performance gains from additional cores depend on software being parallelised. Video editing benefits, but many everyday applications are not designed to use multiple cores fully, so performance does not scale linearly.

错误二：以为更多核心就能让速度翻倍。增加核心带来的性能提升取决于软件是否并行化。视频编辑可以受益，但许多日常应用并未针对多核完全优化，因此性能并非线性增长。

Mistake 3: Stating that cache is the same as RAM. Although both are memory, cache is much smaller, faster, and built from SRAM inside or very close to the CPU, while main memory is typically larger DRAM on the motherboard. They serve different levels in the memory hierarchy.

错误三：声称缓存与 RAM 相同。虽然两者都是内存，但缓存更小、更快，由 CPU 内部或非常靠近 CPU 的 SRAM 构成，而主存通常是主板上的、容量更大的 DRAM。它们在内存层次结构中处于不同的层级。

8. Revision & Exam Tips | 复习与备考建议

To master the Systems Architecture unit, use these targeted revision strategies. They are designed to move your knowledge from surface recall to deep, exam-ready understanding.

为攻克系统架构单元，请采用以下有针对性的复习策略。它们旨在将你的知识从表面记忆深化为应对考试的深层理解。

Draw and label the CPU architecture: Sketching the ALU, CU, PC, MAR, MDR, and buses helps cement the relationships between components. Explain the diagram aloud in both English and your own language until you can do it without notes.
画图标注 CPU 架构：画出 ALU、CU、PC、MAR、MDR 和总线有助于巩固各组件之间的关系。用英语和母语大声讲解该图，直到能不借助笔记脱口而出。
Flashcards for key definitions: Create a set covering terms like “volatile”, “non-volatile”, “clock speed”, “core”, “cache”, “fetch”, “decode”, “execute”. Use active recall daily.
制作关键定义的记忆卡：制作一套卡片，涵盖“易失性”、“非易失性”、“时钟速度”、“核心”、“缓存”、“取指”、“解码”、“执行”等术语，每天使用主动回忆法复习。
Trace the F-D-E cycle step by step: Pick a simple instruction (e.g., ADD the contents of memory location 5) and walk through each register’s content in the fetch and execute stages. This turns theoretical knowledge into practical understanding.
逐步追踪 F-D-E 周期：选一条简单指令（例如，将地址 5 中的内容与累加器相加），逐步追踪各寄存器在取指和执行阶段的内容变化。这样可将理论知识转化为实际理解。
Examine past paper mark schemes: OCR examiners reward correct technical vocabulary. For example, saying “address copied from PC to MAR” scores higher than “the CPU gets the next instruction”. Practice writing answers that use precise language.
研究过往试卷评分标准：OCR 考官青睐正确的技术词汇。例如，“地址从 PC 复制到 MAR”比“CPU 获取下一条指令”得分更高。练习使用精确的语言作答。

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IGCSE OCR Computer Science Unit Test Paper: Systems Architecture | IGCSE OCR 计算机科学单元测试卷：系统架构