📚 IGCSE WJEC Computer Science: Mastering CPU Concepts | IGCSE WJEC 计算机：CPU 考点精讲
The Central Processing Unit (CPU) is the brain of the computer. In the WJEC IGCSE Computer Science syllabus, understanding how the CPU works, its components, and factors affecting its performance is essential. This article covers every key point you need to master for the exam, from Von Neumann architecture to the Fetch-Decode-Execute cycle and beyond.
中央处理器（CPU）是计算机的大脑。在 WJEC IGCSE 计算机科学大纲中，理解 CPU 如何工作、它的组件以及影响其性能的因素至关重要。本文涵盖了考试中你需要掌握的每一个关键点，从冯·诺依曼架构到取指-解码-执行周期及相关知识。
1. What is a CPU? | 什么是中央处理器？
The CPU, or Central Processing Unit, is the primary component of a computer that carries out instructions of a program by performing basic arithmetic, logic, controlling, and input/output operations. It is often referred to as the ‘brain’ of the computer. Every action, from opening a file to running a game, relies on the CPU processing millions of instructions per second.
CPU，即中央处理器，是计算机的主要部件，通过执行基本的算术、逻辑、控制和输入/输出操作来执行程序的指令。它常被称为计算机的“大脑”。从打开文件到运行游戏，每个动作都依赖于 CPU 每秒处理数百万条指令。
2. Von Neumann Architecture | 冯·诺依曼架构
The Von Neumann architecture is the fundamental design of modern computers. In this architecture, both instructions and data are stored in the same main memory unit, and they share the same data bus. This design uses a single control unit and a single ALU. The key registers—Program Counter (PC), Memory Address Register (MAR), Memory Data Register (MDR), Current Instruction Register (CIR), and Accumulator (ACC)—are all part of this model.
冯·诺依曼架构是现代计算机的基本设计。在该架构中，指令和数据存储在同一主存储器单元中，并共享同一条数据总线。该设计使用单一的控制单元和单一的算术逻辑单元。关键寄存器——程序计数器（PC）、内存地址寄存器（MAR）、内存数据寄存器（MDR）、当前指令寄存器（CIR）和累加器（ACC）——都是该模型的一部分。
3. The Control Unit (CU) | 控制单元
The Control Unit is the component of the CPU that directs the operation of the processor. It decodes instructions and generates control signals to orchestrate the movement of data between the CPU registers, the ALU, and the main memory. The CU does not execute instructions itself; it tells other parts of the CPU what to do, acting like a traffic controller.
控制单元是 CPU 的组成部分，负责指挥处理器的操作。它解码指令并生成控制信号，以协调数据在 CPU 寄存器、ALU 和主内存之间的移动。控制单元本身不执行指令；它告诉 CPU 的其他部分该做什么，就像交通指挥员一样。
4. The Arithmetic Logic Unit (ALU) | 算术逻辑单元
The ALU performs all the arithmetic and logical operations. Arithmetic operations include addition, subtraction, multiplication, and division. Logical operations involve comparisons such as greater than, less than, equal to, AND, OR, and NOT. The ALU uses the Accumulator to hold intermediate results during calculations.
ALU 执行所有的算术和逻辑运算。算术运算包括加、减、乘、除。逻辑运算包括比较，例如大于、小于、等于，以及 AND、OR 和 NOT。ALU 使用累加器来保存计算过程中的中间结果。
5. CPU Registers | CPU 寄存器
Registers are small, very fast memory locations inside the CPU. They hold data temporarily during the Fetch-Decode-Execute cycle. Key registers include:
- PC (Program Counter): holds the address of the next instruction.
- MAR (Memory Address Register): holds the memory address about to be read from or written to.
- MDR (Memory Data Register): holds the data that has been fetched from memory or is about to be stored.
- CIR (Current Instruction Register): holds the current instruction being decoded and executed.
- ACC (Accumulator): stores results of calculations performed by the ALU.
寄存器是 CPU 内部很小的、速度非常快的存储位置。它们在取指-解码-执行周期中临时保存数据。关键的寄存器包括：
- PC（程序计数器）：保存下一条指令的地址。
- MAR（内存地址寄存器）：保存即将读取或写入的内存地址。
- MDR（内存数据寄存器）：保存刚从内存中取出的数据，或即将存储的数据。
- CIR（当前指令寄存器）：保存正在被解码和执行的当前指令。
- ACC（累加器）：存储 ALU 执行的计算结果。
6. The Fetch-Decode-Execute Cycle | 取指-解码-执行周期
The Fetch-Decode-Execute cycle is the continuous process the CPU follows to run instructions. The cycle repeats billions of times per second. It consists of three main stages:
- Fetch: The address from the PC is copied to the MAR. The instruction is fetched from memory into the MDR, then copied to the CIR. The PC is incremented to point to the next instruction.
- Decode: The Control Unit decodes the instruction in the CIR to determine what operation needs to be carried out.
- Execute: The CPU carries out the required operation. This may involve the ALU performing a calculation (using the ACC) or a data transfer between the CPU and memory. The cycle then repeats.
取指-解码-执行周期是 CPU 执行指令所遵循的连续过程。该周期每秒重复数十亿次。它包含三个主要阶段：
- 取指：PC 中的地址被复制到 MAR。指令从内存取到 MDR，然后复制到 CIR。PC 递增以指向下一条指令。
- 解码：控制单元解码 CIR 中的指令，以确定需要执行什么操作。
- 执行：CPU 执行所需的操作。这可能涉及 ALU 执行计算（使用 ACC）或 CPU 与内存之间的数据传输。然后周期重复。
7. Clock Speed and Performance | 时钟速度与性能
The clock speed, measured in hertz (Hz), indicates how many cycles the CPU can perform per second. A common measurement is gigahertz (GHz), where 1 GHz = 1 billion cycles per second. A higher clock speed generally means the CPU can execute more instructions per second, improving performance. However, it also generates more heat and may require better cooling.
时钟速度以赫兹（Hz）为单位，表示 CPU 每秒可以执行多少个周期。常见的测量单位是吉赫（GHz），1 GHz 等于每秒 10 亿个周期。较高的时钟速度通常意味着 CPU 每秒可执行更多指令，从而提升性能。然而，它也会产生更多热量，可能需要更好的散热。
8. Cores and Parallel Processing | 核心与并行处理
A core is an independent processing unit within the CPU that can run its own Fetch-Decode-Execute cycle. Multi-core CPUs (dual-core, quad-core, etc.) can process multiple instructions simultaneously, improving multitasking and performance in parallel tasks. However, the benefit is not linear; doubling the cores does not always double the speed because software must be designed to use multiple cores efficiently.
核心是 CPU 内部独立的处理单元，可以运行自己的取指-解码-执行周期。多核 CPU（双核、四核等）可以同时处理多条指令，改善多任务处理和平行任务的性能。然而，增益并非线性；核数翻倍并不总是速度翻倍，因为软件必须被设计为有效利用多个核心。
9. Cache Memory | 高速缓存
Cache is a small amount of very fast memory located inside or very close to the CPU. It stores frequently accessed data and instructions to reduce the time taken to fetch them from main memory (RAM). Caches are typically organised in levels: L1 (fastest, smallest), L2, and sometimes L3. A larger cache can improve performance by reducing the number of times the CPU has to wait for data from slower RAM.
高速缓存是位于 CPU 内部或非常靠近 CPU 的少量非常快速的内存。它存储经常访问的数据和指令，以减少从主内存（RAM）获取它们所需的时间。缓存通常按级别组织：L1（最快、最小）、L2，有时还有 L3。更大的缓存可以减少 CPU 等待较慢 RAM 数据的次数，从而提高性能。
10. Von Neumann Bottleneck | 冯·诺依曼瓶颈
The Von Neumann bottleneck refers to the limitation caused by the shared bus for instructions and data between the CPU and memory. Because instructions and data travel along the same pathway, the CPU may often have to wait while one type of information is being transferred, limiting overall speed. This bottleneck is a key reason why modern systems use cache memory and other techniques to mitigate the delay.
冯·诺依曼瓶颈指的是 CPU 与内存之间共享的指令和数据总线所带来的限制。由于指令和数据沿着相同的通道传输，当一种信息正在传输时，CPU 可能经常需要等待，从而限制了整体速度。这种瓶颈是现代系统使用高速缓存和其他技术来减轻延迟的一个关键原因。
11. Comparing CPU with GPU | CPU 与 GPU 对比
A CPU is optimised for sequential processing and handling a wide variety of tasks quickly. A GPU (Graphics Processing Unit) has a much larger number of simpler cores designed for parallel processing, making it ideal for rendering graphics and performing calculations on large datasets simultaneously. While a CPU is like a few powerful chefs cooking complex dishes, a GPU is like a thousand assistants all chopping vegetables at once.
CPU 针对顺序处理进行了优化，可以快速处理各种任务。GPU（图形处理器）拥有更多更简单的核心，专为并行处理而设计，使其非常适合渲染图形和同时对大数据集执行计算。CPU 就像少数几个能力强的厨师烹饪复杂的菜肴，而 GPU 就像一千个助手同时切菜。
12. Embedded Systems | 嵌入式系统
An embedded system is a computer system with a dedicated function within a larger mechanical or electronic device. It typically uses a microcontroller or a low-power CPU. Examples include washing machines, microwave ovens, car engine management systems, and smart thermostats. These systems are designed to perform a specific task continuously, often with real-time constraints, and are optimised for low power consumption and reliability.
嵌入式系统是在较大的机械或电子设备中具有专用功能的计算机系统。它通常使用微控制器或低功耗 CPU。例子包括洗衣机、微波炉、汽车引擎管理系统和智能恒温器。这些系统被设计成持续执行特定任务，通常具有实时约束，并且针对低功耗和可靠性进行了优化。
Published by TutorHao | Computer Science Revision Series | aleveler.com
更多咨询请联系16621398022（同微信）
屏轩国际教育cambridge primary/secondary checkpoint, cat4, ukiset,ukcat,igcse,alevel,PAT,STEP,MAT, ibdp,ap,ssat,sat,sat2课程辅导，国外大学本科硕士研究生博士课程论文辅导