Computer Architecture | 计算机体系结构

📚 Computer Architecture | 计算机体系结构

This article explains the architecture of a computer system, focusing on the central processing unit (CPU) and how it executes instructions. It is aligned to the Cambridge IGCSE Computer Science topic “1 Computer architecture”.

本文解释计算机系统的体系结构，重点介绍中央处理器（CPU）及其执行指令的方式。内容与剑桥 IGCSE 计算机科学“1 计算机体系结构”主题对齐。

1. The Central Processing Unit (CPU) | 中央处理器（CPU）

The CPU is often called the brain of the computer. It processes instructions and data, and it controls the other parts of the system by sending control signals.

CPU 常被称为计算机的大脑。它处理指令和数据，并通过发送控制信号来控制系统中的其他部件。

A modern CPU contains several key components: the arithmetic logic unit, the control unit, registers, cache memory, clock and internal buses. These components work together to fetch, decode and execute instructions.

现代 CPU 包含几个关键组成部分：算术逻辑单元、控制单元、寄存器、高速缓存、时钟和内部总线。这些部件共同工作，完成取指、译码和执行指令。

CPUs are used in general-purpose computers such as desktops and laptops, but also in many embedded devices. The design of a CPU directly affects processing speed, power consumption and cost.

CPU 既用于台式机和笔记本电脑等通用计算机，也用于许多嵌入式设备。CPU 的设计直接影响处理速度、功耗和成本。

2. Von Neumann Architecture | 冯·诺依曼体系结构

The Von Neumann architecture is the foundation of most computer systems. It stores both data and instructions in the same main memory, and the CPU can treat them in a similar way when accessing memory.

冯·诺依曼体系结构是大多数计算机系统的基础。它将数据和指令存储在同一个主存储器中，CPU 在访问内存时可以用相似的方式处理它们。

This design is based on the stored program concept: a program is loaded into memory from secondary storage, and the CPU then fetches instructions one after another from that memory.

这种设计基于存储程序概念：程序从辅助存储器加载到内存中，然后 CPU 从内存中逐条取出指令。

Because data and instructions share the same bus and memory, a bottleneck can occur when both need to travel between the CPU and memory at the same time. This is called the Von Neumann bottleneck.

由于数据和指令共用同一条总线和内存，当两者需要同时在 CPU 和内存之间传输时，就会产生瓶颈。这被称为冯·诺依曼瓶颈。

The Von Neumann architecture is simpler to design and build, but it can be slower than alternative architectures when large amounts of data are being moved.

冯·诺依曼体系结构设计和构建更简单，但在传输大量数据时可能比其他体系结构更慢。

3. Components of the CPU: ALU and CU | CPU 的组成：算术逻辑单元与控制单元

The arithmetic logic unit (ALU) performs arithmetic operations such as addition, subtraction, multiplication and division. It also performs logical operations such as AND, OR, NOT and comparisons.

算术逻辑单元（ALU）执行加法、减法、乘法和除法等算术运算。它还执行与、或、非和比较等逻辑运算。

The ALU receives data from CPU registers, operates on that data, and stores the result back into a register such as the accumulator.

ALU 从 CPU 寄存器接收数据，对数据进行运算，然后将结果存回累加器等寄存器中。

The control unit (CU) does not process data itself. Instead, it decodes instructions and sends control signals to coordinate the ALU, registers, cache and buses so that each instruction is carried out correctly.

控制单元（CU）本身不处理数据。相反，它译码指令并发送控制信号，协调 ALU、寄存器、缓存和总线，使每条指令能正确执行。

Together, the ALU and CU form the processing core of the CPU. The ALU carries out the actual processing, while the CU manages the order and timing of operations.

ALU 和 CU 共同构成 CPU 的处理核心。ALU 执行实际处理，而 CU 管理操作的顺序和时序。

4. Registers and Their Roles | 寄存器及其作用

Registers are small, high-speed storage locations inside the CPU. They hold data, addresses or instructions temporarily while the processor is working on them.

寄存器是 CPU 内部的小型高速存储位置。它们在处理器工作时临时保存数据、地址或指令。

Registers have a very small capacity compared with main memory, but they can be accessed much faster because they are located directly inside the CPU.

与主存相比，寄存器的容量非常小，但由于它们直接位于 CPU 内部，因此访问速度要快得多。

The table below summarises five commonly tested CPU registers.

下表总结了五个常考的 CPU 寄存器。

Register	Function	功能
PC	Holds the address of the next instruction to be fetched	存放下一条要取出的指令的地址
MAR	Holds the memory address currently being read from or written to	保存当前正在读取或写入的内存地址
MDR	Holds the data or instruction that has been transferred between memory and the CPU	保存在内存和 CPU 之间传输的数据或指令
CIR	Holds the current instruction while it is being decoded and executed	在当前指令被译码和执行期间保存该指令
ACC	Stores the result of calculations performed by the ALU	存储 ALU 执行计算的结果

Although registers store very little data, they operate at processor speed and are essential for the fetch-decode-execute cycle.

虽然寄存器存储的数据很少，但它们以处理器速度运行，对取指—译码—执行周期至关重要。

5. Cache Memory | 高速缓存

Cache memory is a small amount of very fast memory located inside or very close to the CPU. It stores frequently used instructions and data so that the processor can access them quickly.

高速缓存是位于 CPU 内部或非常靠近 CPU 的少量超快内存。它存储常用的指令和数据，使处理器能够快速访问它们。

When the CPU needs data, it first checks the cache. If the data is found there, it is called a cache hit and no main memory access is needed. If it is not found, it is called a cache miss and the CPU must fetch the data from slower main memory.

当 CPU 需要数据时，会先检查缓存。如果在缓存中找到数据，就称为缓存命中，不需要访问主存。如果没有找到，就称为缓存未命中，CPU 必须从较慢的主存中获取数据。

Cache is often organised into levels. Level 1 cache is the fastest and smallest, Level 2 is larger but slightly slower, and Level 3 is larger again and shared between cores in many processors.

缓存通常分为多个级别。一级缓存最快也最小，二级缓存更大但稍慢，三级缓存则更大，并且在许多处理器中由多个核心共享。

Cache memory is more expensive than RAM, so it is used in relatively small amounts. However, even a small cache can significantly improve performance by reducing the average time needed to access instructions and data.

高速缓存比 RAM 更昂贵，因此使用量相对较小。然而，即使是小容量缓存，也能通过减少访问指令和数据的平均时间，显著提高性能。

6. Buses and Data Transfer | 总线与数据传输

A bus is a set of parallel wires that carries signals between components. A computer system uses three main buses: the address bus, the data bus and the control bus.

总线是一组在部件之间传输信号的并行线路。计算机系统使用三种主要总线：地址总线、数据总线和控制总线。

The address bus carries memory addresses from the CPU to memory or input/output devices. It is usually unidirectional, meaning it only sends addresses in one direction.

地址总线将内存地址从 CPU 传送到内存或输入/输出设备。它通常是单向的，即只朝一个方向发送地址。

The data bus carries actual data or instructions between the CPU, memory and input/output devices. It is bidirectional because data can travel both to and from the CPU.

数据总线在 CPU、内存和输入/输出设备之间传输实际数据或指令。它是双向的，因为数据可以进出 CPU。

The control bus carries control signals such as read, write, clock and interrupt signals. These signals coordinate the timing and direction of data transfers.

控制总线传送读、写、时钟和中断等控制信号。这些信号协调数据传输的时序和方向。

The width of the address bus determines how many memory locations can be addressed. For example, a 32-bit address bus can directly address 2³² different memory locations.

地址总线的宽度决定了可以寻址的内存位置数量。例如，32 位地址总线可以直接寻址 2³² 个不同的内存位置。

7. The Fetch-Decode-Execute Cycle | 取指—译码—执行周期

The CPU repeats a continuous process called the fetch-decode-execute cycle. Every instruction passes through these three stages before the next instruction begins.

CPU 不断重复一个称为取指—译码—执行周期的过程。每条指令都要经过这三个阶段，然后才开始下一条指令。

Fetch → Decode → Execute → Repeat

In the fetch stage, the address in the program counter is copied to the memory address register. The CPU places this address on the address bus and sends a read signal. The instruction is then placed on the data bus into the memory data register, copied to the current instruction register, and the program counter is incremented to point to the next instruction.

在取指阶段，程序计数器中的地址被复制到内存地址寄存器。CPU 将该地址放到地址总线上并发送读信号。然后指令通过数据总线进入内存数据寄存器，再被复制到当前指令寄存器，同时程序计数器加一，指向下一条指令。

In the decode stage, the control unit interprets the instruction held in the current instruction register. It identifies the operation code and determines which parts of the CPU are needed to carry out the instruction.

在译码阶段，控制单元解释当前指令寄存器中保存的指令。它识别操作码，并确定需要 CPU 的哪些部分来执行该指令。

In the execute stage, the instruction is carried out. This may involve the ALU performing a calculation, data being transferred between registers, or data being read from or written to memory. The result is often stored in the accumulator.

在执行阶段，指令被实际执行。这可能包括 ALU 执行计算、数据在寄存器之间传输，或者从内存读取数据或向内存写入数据。结果通常存储在累加器中。

Once the execute stage is complete, the cycle starts again with the next fetch. The clock signal keeps these stages synchronised so that the CPU operates in an orderly sequence.

执行阶段完成后，周期又从下一条取指开始。时钟信号使这些阶段保持同步，确保 CPU 按有序的顺序运行。

8. CPU Performance Factors | CPU 性能影响因素

Clock speed is the number of cycles a CPU can perform per second, measured in hertz. A processor running at 3.2 GHz performs 3.2 × 10⁹ cycles per second.

时钟速度是 CPU 每秒可以执行的周期数，以赫兹为单位。运行在 3.2 GHz 的处理器每秒执行 3.2 × 10⁹ 个周期。

A higher clock speed generally means instructions are processed faster, but increasing clock speed also produces more heat and uses more power. Processors cannot simply be run at unlimited speeds.

更高的时钟速度通常意味着指令处理得更快，但提高时钟速度也会产生更多热量并消耗更多电能。处理器不可能简单地无限提速。

Execution time ≈ Instructions × CPI ÷ Clock speed

The number of cores also affects performance. A multi-core CPU contains several processing units and can execute multiple instructions at the same time, but the benefit depends on whether software is written to use multiple cores.

核心数量也会影响性能。多核 CPU 包含多个处理单元，可以同时执行多条指令，但其优势取决于软件是否被编写为使用多个核心。

Cache size is another factor. A larger cache can store more frequently used data and instructions, which reduces the number of slower accesses to main memory and improves overall performance.

缓存大小是另一个因素。更大的缓存可以存储更多常用数据和指令，从而减少对主存的较慢访问次数，提高整体性能。

Other factors include the width of the data bus, the size of the instruction set and the overall architecture of the processor. These all influence how efficiently the CPU can move and process data.

其他因素包括数据总线的宽度、指令集的大小以及处理器的整体架构。这些都会影响 CPU 传输和处理数据的效率。

9. Instruction Sets | 指令集

A machine instruction is a binary pattern that tells the CPU what action to perform. It typically consists of an operation code and an operand.

机器指令是告诉 CPU 执行什么操作的二进制模式。它通常由操作码和操作数组成。

The operation code, or opcode, specifies the operation to be carried out, such as ADD, LOAD or JUMP. The operand provides the data or the memory address on which the operation should be performed.

操作码指定要执行的操作，例如 ADD、LOAD 或 JUMP。操作数提供操作应使用的数据或内存地址。

The instruction set is the complete collection of machine instructions that a particular processor can understand and execute. Different processor families have different instruction sets, which is why programs compiled for one processor may not run on another.

指令集是特定处理器能够理解和执行的机器指令的完整集合。不同的处理器系列有不同的指令集，因此为一种处理器编译的程序可能无法在另一种处理器上运行。

Some CPUs use a complex instruction set with many instructions, while others use a reduced instruction set with fewer and simpler instructions. The choice affects power consumption, chip complexity and performance.

有些 CPU 使用包含大量指令的复杂指令集，而另一些则使用指令更少、更简单的精简指令集。这种选择会影响功耗、芯片复杂度和性能。

10. Embedded Systems | 嵌入式系统

An embedded system is a computer system built into a larger device to perform a dedicated function. It is not designed to be a general-purpose computer controlled by the user in the usual way.

嵌入式系统是内置于较大设备中、用于执行特定功能的计算机系统。它不是由用户按通常方式控制的通用计算机。

Examples of embedded systems include washing machines, microwave ovens, digital cameras, car engine control units, traffic lights and medical devices. Each one has a specific task and runs fixed or limited software.

嵌入式系统的例子包括洗衣机、微波炉、数码相机、汽车发动机控制单元、交通信号灯和医疗设备。每个系统都有特定任务，并运行固定或有限的软件。

Embedded systems often use a microcontroller, which combines a processor, memory and input/output interfaces on a single chip. They are designed to be small, low-cost, reliable and energy efficient.

嵌入式系统通常使用微控制器，它将处理器、存储器和输入/输出接口集成在单个芯片上。它们被设计为体积小、成本低、可靠性高且能效高。

The main advantage of an embedded system is that it can be optimised for one task, making it cheaper and more reliable than a general-purpose computer. The main disadvantage is that it is difficult to upgrade or reprogram once it has been built into the device.

嵌入式系统的主要优点是它可以针对单一任务进行优化，从而比通用计算机更便宜、更可靠。主要缺点是，一旦被内置到设备中，就很难升级或重新编程。

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Computer Architecture | 计算机体系结构