Logic Networks: Construction and Analysis | 逻辑网络的构建与分析

📚 Logic Networks: Construction and Analysis | 逻辑网络的构建与分析

Logic networks form one of the most elegant bridges between pure mathematics and practical computing. In the IB Discrete Mathematics option, students learn to construct logic circuits from Boolean expressions and to analyse their behaviour using truth tables, equivalent simplifications and network applications such as flow and critical path analysis. This article provides a comprehensive review of these interconnected concepts, with exam-focused techniques and worked examples.

逻辑网络是纯数学与实用计算之间最优雅的桥梁之一。在IB离散数学选项中，学生需要学会从布尔表达式构建逻辑电路，并通过真值表、等价化简以及网络流和关键路径分析等应用来研究其行为。本文将全面复习这些相互关联的概念，并提供以考试为重点的技巧与例题。

1. Boolean Propositions and Truth Values | 命题与真值

A proposition is a statement that is unambiguously either true (T) or false (F). Compound propositions are formed using logical connectives; the three most important are conjunction (AND, written A ∧ B), disjunction (OR, written A ∨ B) and negation (NOT, written ¬A). For two propositions there are four possible truth-value assignments, and every connective is fully defined by its truth table.

命题是能够明确判定为真（T）或假（F）的陈述。复合命题由逻辑联结词构成，其中最重要的是合取（AND，记作 A ∧ B）、析取（OR，记作 A ∨ B）和非（NOT，记作 ¬A）。对于两个命题，共有四种真值指派，每个联结词都由其真值表完全确定。

Beyond these, the implication A → B is equivalent to ¬A ∨ B, and the biconditional A ↔ B is equivalent to (A → B) ∧ (B → A). In exams, always start from the truth table: it is the most reliable way to verify any identity.

此外，蕴含式 A → B 等价于 ¬A ∨ B，双蕴含式 A ↔ B 等价于 (A → B) ∧ (B → A)。在考试中，始终从真值表出发：这是验证任何恒等式最可靠的方法。

2. Logic Gates: The Building Blocks | 逻辑门：基本构件

In circuit terms, each connective corresponds to a logic gate. The AND gate outputs 1 only when both inputs are 1; the OR gate outputs 1 when at least one input is 1; the NOT gate inverts its input. These gates are the elementary building blocks of digital logic networks, and circuit diagrams combine them into complex expressions.

在电路术语中，每个联结词对应一个逻辑门。与门仅在两个输入均为1时输出1；或门在至少一个输入为1时输出1；非门则对输入取反。这些门是数字逻辑网络的基本构件，电路图将它们组合成复杂表达式。

When drawing circuits, pay attention to three conventions. First, variables and their negations are available as inputs. Second, wire crossings without a dot do not connect. Third, the output of one gate can fan out to several later gates. These conventions appear frequently in exam diagrams, so familiarity prevents careless mistakes.

绘制电路图时需注意三个约定：第一，变量及其否定形式都可用作输入；第二，没有圆点的交叉线不连通；第三，一个门的输出可分支连接到多个后续门。这些约定在试卷图中频繁出现，熟悉它们可以避免粗心错误。

3. Universal Gates: NAND and NOR | 通用门：与非门和或非门

NAND and NOR are called universal gates because any Boolean function can be constructed using only NAND gates or only NOR gates. The NAND gate gives A↑B = ¬(A ∧ B), and the NOR gate gives A↓B = ¬(A ∨ B). Their truth tables are:

与非门和或非门被称为通用门，因为任何布尔函数都可以仅用与非门或仅用或非门来构造。与非门的输出为 A↑B = ¬(A ∧ B)，或非门的输出为 A↓B = ¬(A ∨ B)。其真值表如下：

For example, the NOT gate can be built from a NAND gate by tying the inputs together: ¬A = A↑A. An AND gate can be constructed as A∧B = (A↑B)↑(A↑B). Similarly, NOR gates alone can simulate NOT, AND and OR. This universal property matters in industry because one chip type can implement every function, reducing cost and simplifying design.

例如，非门可由与非门将两个输入端连在一起实现：¬A = A↑A。与门可构造为 A∧B = (A↑B)↑(A↑B)。类似地，仅用或非门也可以模拟非、与和或。这种通用性在工业中非常重要，因为一种芯片即可实现所有功能，从而降低成本并简化设计。

4. Constructing Circuits from Boolean Expressions | 由布尔表达式构建电路

To construct a circuit from a Boolean expression, we systematically decompose the expression according to operator precedence: parentheses first, then NOT, then AND, then OR. Each sub-expression becomes one gate, and the output of each gate feeds the next stage. The final output represents the whole expression.

要根据布尔表达式构建电路，我们根据运算符优先级系统地对表达式进行分解：先处理括号，再处理非，然后是与，最后是或。每个子表达式对应一个逻辑门，每个门的输出进入下一级，最终输出代表整个表达式。

Consider the expression F = (A ∧ B) ∨ (¬A ∧ C). The decomposition is:

• Stage 1: compute X = A ∧ B and Y = ¬A; the Y gate is a NOT gate on A.
• Stage 2: compute Z = Y ∧ C = ¬A ∧ C.
• Stage 3: compute F = X ∨ Z = (A ∧ B) ∨ (¬A ∧ C).

考虑表达式 F = (A ∧ B) ∨ (¬A ∧ C)。其分解为：

• 第1级：计算 X = A ∧ B 和 Y = ¬A；Y 是对 A 取非的门。
• 第2级：计算 Z = Y ∧ C = ¬A ∧ C。
• 第3级：计算 F = X ∨ Z = (A ∧ B) ∨ (¬A ∧ C)。

When drawing, place inputs on the left, gates in the middle and the output on the right. Label intermediate wires clearly; many IB mark schemes credit the intermediate expressions, not just the final drawing.

绘制时，将输入放在左侧，门放在中间，输出放在右侧。清楚标注中间连线；许多IB评分标准会为中间表达式给分，而不只看最终图形。

5. Analysing Circuits with Truth Tables | 用真值表分析电路

To analyse a circuit, we evaluate its output for every combination of input values. Write down all input states, then compute the sub-expressions in order before the final output. This method is systematic and always reliable, but it grows exponentially: n inputs require 2ⁿ rows.

分析电路时，需要为所有输入值组合计算输出。先列出全部输入状态，再按顺序计算各子表达式，最后得到最终输出。这种方法系统可靠，但会指数增长：n 个输入需要 2ⁿ 行。