📚 4E3 Circuit Diagrams: From Logic Gates to Boolean Expressions | 4E3 电路图：从逻辑门到布尔表达式
Circuit diagrams are the universal language of digital electronics and computer hardware. In the context of Computer Science, understanding circuit diagrams means being able to translate logical thinking into visual form – mapping inputs, gates, and outputs to solve real-world computational problems. This article covers everything from basic logic gates and truth tables to Boolean algebra, circuit simplification, and practical implementations like the half adder.
电路图是数字电子和计算机硬件的通用语言。在计算机科学中，理解电路图意味着能够将逻辑思维转化为视觉形式——把输入、门电路和输出对应起来，解决实际的计算问题。本文将涵盖从基本逻辑门和真值表到布尔代数、电路化简以及半加器等实际实现的全部内容。
1. Introduction to Logic Circuit Diagrams | 逻辑电路图简介
A logic circuit diagram is a graphical representation of a digital circuit built from logic gates. It shows how binary signals (0 and 1) flow through gates to produce a desired output. These diagrams are fundamental to designing processors, memory units, and control systems, and they follow standard symbols such as those found in the ANSI/IEEE standard.
逻辑电路图是由逻辑门构成的数字电路的图形化表示。它展示了二进制信号（0 和 1）如何通过门电路流动以产生所需的输出。这些图是设计处理器、存储单元和控制系统的基础，并遵循 ANSI/IEEE 等标准中规定的符号规范。
In examination contexts, you are often asked to draw a circuit for a given Boolean expression, deduce the expression from a diagram, or fill in a truth table. Mastering the visual language of gates is the first step towards understanding how a computer performs arithmetic and makes decisions at the hardware level.
在考试中，你经常会被要求为给定的布尔表达式绘制电路图、从图中推导表达式，或填写真值表。掌握门电路的视觉语言是理解计算机如何在硬件层面执行算术运算和做出决策的第一步。
2. Basic Logic Gates: Symbols and Functions | 基本逻辑门：符号与功能
The three fundamental gates are AND, OR, and NOT. The AND gate outputs 1 only when all inputs are 1; its operation is represented by multiplication (A·B). The OR gate outputs 1 if at least one input is 1, represented by addition (A + B). The NOT gate, or inverter, flips the input: if A = 0, output = 1. Their standard symbols are distinct shapes: a D-shaped AND, a curved OR, and a triangle with a bubble for NOT.
三个基本门是与门、或门和非门。与门仅在所有输入均为 1 时输出 1，其运算用乘法（A·B）表示；或门只要至少一个输入为 1 就输出 1，用加法（A + B）表示；非门即反相器，会翻转输入：若 A = 0，则输出 1。它们的标准符号形状各不相同：与门为平底 D 形，或门为弯曲形，非门为带小圆圈的三角形。
Derived gates include NAND, NOR, XOR, and XNOR. A NAND gate is an AND followed by a NOT; it gives the opposite of AND. Similarly, a NOR gate is an OR followed by a NOT. XOR (exclusive OR) outputs 1 when the inputs are different, and XNOR outputs 1 when the inputs are the same. Each has its own Boolean expression and symbol.
衍生门包括与非门、或非门、异或门和同或门。与非门是与门后接非门，其输出与与门相反；或非门是或门后接非门。异或门当输入不同时输出 1，同或门当输入相同时输出 1。每一种都有各自的布尔表达式和符号。
| Gate | Boolean Expression | Symbol (text) |
|---|---|---|
| AND | Q = A·B | D-shape |
| OR | Q = A + B | curved shield |
| NOT | Q = Ā | triangle + bubble |
| NAND | Q = ¬(A·B) | AND + bubble |
| NOR | Q = ¬(A + B) | OR + bubble |
| XOR | Q = A ⊕ B | OR with extra line |
3. Truth Tables as a Foundation | 作为基础的真值表
A truth table lists all possible combinations of inputs and the corresponding output for a logic circuit. For a circuit with n inputs, there are 2ⁿ rows. Truth tables provide a systematic way to verify circuit behavior and are essential for converting between Boolean expressions and circuit diagrams.
真值表列出了逻辑电路所有可能的输入组合及其对应的输出。对于有 n 个输入的电路，共有 2ⁿ 行。真值表提供了验证电路行为的系统方法，对于在布尔表达式和电路图之间进行转换至关重要。
For example, the truth table for a two-input AND gate has rows (0,0)=0, (0,1)=0, (1,0)=0, (1,1)=1. To derive a Boolean expression from a truth table, you can write a sum of products (SOP) by OR-ing the minterms where the output is 1.
例如，二输入与门的真值表有 (0,0)=0、(0,1)=0、(1,0)=0、(1,1)=1 四行。要从真值表推导布尔表达式，可以通过对输出为 1 的最小项进行或运算（积之和式）来实现。
When a circuit diagram is given, you can construct its truth table by determining the output for every combination, often working through intermediate points inside the circuit. This skill is frequently tested in exams.
当给出电路图时，你可以通过确定每种组合下的输出来构建其真值表，通常需要借助电路中的中间节点逐步推导。这一技能在考试中经常考查。
4. Boolean Algebra: The Mathematical Backbone | 布尔代数：数学支柱
Boolean algebra uses variables that can only take the values 0 or 1 and operations AND (·), OR (+), and NOT (¬). Understanding identities like A·0 = 0, A+1 = 1, A·A = A, A·Ā = 0, and De Morgan’s laws allows you to simplify expressions before drawing circuits, making them cheaper and more efficient.
布尔代数使用的变量只能取值 0 或 1，运算包括与 (·)、或 (+) 和非 (¬)。理解诸如 A·0 = 0、A+1 = 1、A·A = A、A·Ā = 0 等恒等式以及德摩根定律，能够让你在绘制电路前简化表达式，使电路更经济高效。
De Morgan’s laws are particularly important: ¬(A·B) = ¬A + ¬B and ¬(A + B) = ¬A·¬B. They show how an AND gate with inverted output can be replaced by an OR gate with inverted inputs, which is crucial for transforming circuits using NAND or NOR technology.
德摩根定律尤为重要：¬(A·B) = ¬A + ¬B 和 ¬(A + B) = ¬A·¬B。它们表明，带有反相输出的与门可以替换为带反相输入的或门，这对于使用与非门或或非门技术来转换电路至关重要。
Because Boolean algebra is the algebraic representation of logic diagrams, proficiency here directly translates into the ability to design and optimize circuits for any given logic problem.
由于布尔代数是逻辑图的代数表达，熟练掌握它就能直接为任何给定的逻辑问题设计和优化电路。
5. Drawing Standard Circuit Diagrams | 绘制标准电路图
When drawing circuit diagrams by hand or using software, you must use clear, unambiguous symbols. Inputs are placed on the left, outputs on the right. Signals flow from left to right. Each gate is labelled with its standard shape, and connections are laid out without unnecessary crossings. In examination sketches, neatness matters because a messy diagram may obscure the logic.
无论是手工还是用软件绘制电路图，都必须使用清晰、无歧义的符号。输入放在左侧，输出放在右侧，信号从左向右流动。每个门都以其标准形状标注，连线布局应避免不必要的交叉。在考试草图中，整洁非常重要，因为凌乱的图可能掩盖逻辑。
It is common to break a complex expression into sub-expressions, draw a sub-circuit for each, and then combine them. For instance, the expression Q = (A·B) + (¬C) would have an AND gate for A·B, a NOT gate for ¬C, and finally an OR gate combining both outputs. Always label intermediate nodes to aid understanding.
通常的做法是将复杂表达式拆分为若干子表达式，为每个子表达式绘制子电路，然后将它们组合起来。例如，表达式 Q = (A·B) + (¬C) 会有一个与门处理 A·B，一个非门处理 ¬C，最后用一个或门将两个输出合并。始终标注中间节点以帮助理解。
6. Building Combined Circuits: AND-OR and OR-AND Forms | 构建组合电路：与-或和或-与形式
Two-level circuits are widely used for implementing Boolean functions. The sum-of-products (SOP) form uses AND gates on the first level to generate product terms, which are then fed into a single OR gate. The product-of-sums (POS) form uses OR gates first, then an AND gate at the output. These forms correspond directly to circuit diagrams that are easy to build with standard chips.
二级电路广泛用于实现布尔函数。积之和（SOP）形式在第一级使用与门产生乘积项，然后馈入单个或门；和之积（POS）形式则先用或门，输出再经过与门。这些形式直接对应易于用标准芯片构建的电路图。
For example, the SOP expression Q = A·B + Ā·C leads to a circuit with two AND gates and one OR gate. By examining the diagram, you can instantly read the Boolean expression, which is a huge advantage during analysis and debugging.
例如，SOP 表达式 Q = A·B + Ā·C 会形成一个由两个与门和一个或门组成的电路。通过查看图，你可以立刻读出布尔表达式，这在分析和调试时是一个巨大的优势。
When drawing such circuits, care must be taken to use exactly the number of gates indicated by the expression. Adding extra inverters for complemented variables is acceptable, but the overall structure should remain clean and match the equation exactly.
绘制此类电路时，必须严格使用表达式所指示的门数量。为补变量添加额外的反相器是可以接受的，但整体结构应保持整洁，并与方程完全匹配。
7. The Universality of NAND and NOR Gates | 与非门和或非门的普适性
NAND and NOR gates are called universal gates because any Boolean function can be implemented using only NAND gates, or only NOR gates. This is extremely important in manufacturing, where stocking a single type of gate reduces costs and simplifies circuit board design.
与非门和或非门被称为通用门，因为任何布尔函数都可以只使用与非门或只使用或非门来实现。这在制造中极为重要，因为积压单一类型的门可以降低成本并简化电路板设计。
To convert a conventional AND-OR circuit into a NAND-only circuit, you can double-invert the OR output and push the inversions back using De Morgan’s theorem, which changes the OR gate into a NAND with inverted inputs. The resulting diagram will consist entirely of NAND symbols, often with some inputs inverted.
要将传统的与-或电路转换为纯与非门电路，可以对或门输出进行双重反相，并运用德摩根定理将反相推回，这样或门就变成了输入反相的与非门。最终得到的图将完全由与非符号组成，通常某些输入会被反相。
Similarly, using NOR-only design doubles inversions and transforms AND gates into NOR gates with inverted inputs. This skill is frequently assessed, and you may be asked to redraw a given circuit using only one gate type.
同理，采用纯或非门设计时，进行双重反相并将与门转换为输入反相的或非门。这一技能经常被考查，你可能会被要求仅使用一种门类型来重绘给定的电路。
8. Simplifying Circuits via Boolean Manipulation | 通过布尔运算化简电路
Before drawing a circuit, it is wise to simplify the Boolean expression to minimise gate count. Use laws such as absorption (A + A·B = A), distribution (A·(B + C) = A·B + A·C), and consensus (A·B + Ā·C + B·C = A·B + Ā·C). Fewer gates mean lower propagation delay, less power consumption, and smaller chip area.
在绘制电路之前，明智的做法是简化布尔表达式以最小化门的数量。运用吸收律（A + A·B = A）、分配律（A·(B + C) = A·B + A·C）和一致律（A·B + Ā·C + B·C = A·B + Ā·C）等定律。更少的门意味着更低的传播延迟、更少的功耗和更小的芯片面积。
Consider the expression Q = A·B + A·ĒC + B·C. By extracting A·B from the first two terms and applying absorption, it reduces to Q = A·B + B·C, eliminating one AND gate. The simplified circuit will be more elegant and less prone to error.
考虑表达式 Q = A·B + A·ĒC + B·C。从第一项和第二项中提取 A·B 并运用吸收律，可化简为 Q = A·B + B·C，从而减少一个与门。化简后的电路更优雅，出错的可能性也更低。
Always double-check the simplification with a truth table to ensure equivalency. Formal methods like Karnaugh maps also help, but for smaller expressions a solid grasp of Boolean identities is sufficient for exam success.
务必用真值表复核化简结果以确保等价。像卡诺图这样的正规方法也有帮助，但对于较小的表达式，牢固掌握布尔恒等式就足以应对考试。
9. From Boolean Expression to Circuit and Back | 从布尔表达式到电路再返回
The ability to convert a Boolean expression into a circuit diagram and vice versa is a core competency. Starting from an expression, identify the primary operation (the gate at the final output) and work backwards towards the inputs. Each operator corresponds to a gate, and each variable corresponds to an input line.
能够将布尔表达式转换为电路图，反之亦然，是一项核心能力。从表达式开始，识别主要操作（最终输出处的门），然后逆向直至输入。每个运算符对应一个门，每个变量对应一条输入线。
Conversely, given a diagram, walk from left to right writing the Boolean output of each gate. For instance, if an AND gate receives A and the output of a NOT gate fed by B, write A·ĒB at that node. Continue until you reach the final output expression.
反过来，给定一个电路图，从左向右依次写出每个门的布尔输出。例如，如果一个与门接收到 A 以及一个由 B 驱动的非门的输出，就在该节点写上 A·ĒB。如此进行，直到得到最终输出表达式。
Practise with multi-level circuits and incorporate parentheses to maintain precedence. This bidirectional skill is tested in almost every 4E3 paper, so steady practice with varied examples is key.
用多级电路进行练习，并用括号来保持优先级。这种双向转换技能几乎在每一份 4E3 试卷中都会考查，因此通过多样化的例子进行稳定练习是关键。
10. Practical Example: Half Adder and Full Adder | 实例：半加器与全加器
The half adder is a classic circuit that adds two single-bit numbers. It has two outputs: Sum (S) and Carry (C). The Boolean expressions are S = A ⊕ B and C = A·B. The circuit diagram uses one XOR gate and one AND gate. It perfectly illustrates how logic gates perform arithmetic.
半加器是一个经典电路，用于对两个一位二进制数求和。它有两个输出：和 (S) 与进位 (C)。布尔表达式为 S = A ⊕ B，C = A·B。电路图使用一个异或门和一个与门，完美地展示了逻辑门如何执行算术运算。
A full adder extends this by accepting an additional input carry (Cin). Its outputs are S = A ⊕ B ⊕ Cin and Cout = A·B + Cin·(A ⊕ B). The circuit can be built using two half adders and an OR gate. Drawing this diagram consolidates understanding of multi-input XOR and AND-OR structures.
全加器在此基础上增加了一个进位输入 (Cin)。其输出为 S = A ⊕ B ⊕ Cin，Cout = A·B + Cin·(A ⊕ B)。该电路可用两个半加器和一个或门构建。绘制这个图可以巩固对多输入 XOR 和 AND-OR 结构的理解。
In digital computers, full adders are chained together to create adders for words of any length, such as 8-bit or 32-bit. Recognising adder circuits in a diagram is a valuable skill.
在数字计算机中，全加器被级联起来以构成任意字长的加法器，例如 8 位或 32 位。在电路图中识别出加法器电路是一项宝贵的技能。
11. Common Pitfalls and Troubleshooting Circuit Diagrams | 常见陷阱与电路图故障排查
Errors frequently occur when students forget the order of precedence in Boolean algebra: AND has higher precedence than OR, unless parentheses override it. In circuit diagrams, this translates to connecting gates incorrectly. Always add parentheses explicitly in the expression before drawing.
一个常见错误是学生忘记了布尔代数中的优先级顺序：与运算的优先级高于或运算，除非用括号改写。在电路图中，这会导致门连接错误。在绘制前，务必在表达式中明确加上括号。
Another common mistake is missing inverters for complemented variables. If the expression contains Ā, you must include a NOT gate on that input unless a complemented signal is already available elsewhere. Additionally, unlabelled wires and ambiguous junctions can make a diagram unreadable – use solid dots only for connections.
另一个常见错误是遗漏补变量的反相器。如果表达式中含有 Ā，则必须为该输入添加一个非门，除非在其他地方已经提供了补信号。此外，未标记的连线和模糊的连接点会使图无法读取——只有在有连接的地方才使用实心圆点。
Troubleshooting a diagram involves comparing its truth table with the expected truth table. Discrepancies reveal where the logic is broken. Simulation software or simple manual tracing can quickly pinpoint the faulty gate or incorrect connection.
排查电路图故障需要将其真值表与预期真值表进行比较。差异之处能揭示逻辑在哪里出了问题。仿真软件或简单的手动追踪可以迅速定位到有问题的门或错误的连接。
12. Summary and Exam Tips for 4E3 Circuit Diagrams | 4E3 电路图总结与备考技巧
Mastering circuit diagrams requires a blend of theory and practice. Know the symbol and truth table of every gate by heart, be fluent in Boolean manipulation, and practise converting between expressions, truth tables, and diagrams. When faced with a long question, first simplify the expression, then draw a neat, labelled diagram, and finally verify with a quick truth table check.
掌握电路图需要理论与实践相结合。牢记每一种门的符号和真值表，熟练进行布尔运算，并练习在表达式、真值表和电路图之间进行转换。遇到长题目时，先化简表达式，然后绘制整洁、带标注的图，最后用一个快速的真相表检查进行验证。
In the exam, show your intermediate working clearly. Partial credit is often awarded for correct sub-circuits even if the final answer contains a minor mistake. Use a pencil for diagrams so you can make clean adjustments. Remember that examiners look for precision in gate shapes and connection dots.
在考试中，要清晰地展示中间步骤。即使最终答案有一点小错，正确的子电路通常也能获得部分分数。用铅笔绘制电路图，以便进行整洁的修改。记住，考官看重门形状和连接点是否精确。
By treating circuit diagrams not as a mystery but as a direct visualisation of Boolean equations, you can tackle any 4E3 question with confidence. Happy designing!
只要把电路图不是看作神秘之物，而是布尔方程的直接可视化，你就能自信地应对任何 4E3 题目。祝你设计愉快！
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