IGCSE AQA Computer Science: Computer Architecture Key Notes | IGCSE AQA 计算机：计算机体系结构 考点精讲

📚 IGCSE AQA Computer Science: Computer Architecture Key Notes | IGCSE AQA 计算机：计算机体系结构 考点精讲

Welcome to this comprehensive revision guide covering the core concepts of computer architecture as required by the AQA IGCSE Computer Science specification. Understanding the internal structure and operation of the central processing unit is fundamental to mastering the subject. We will explore the Von Neumann architecture, CPU components, registers, buses, the fetch-decode-execute cycle, factors affecting performance, and embedded systems.

欢迎阅读这份全面的复习指南，涵盖 AQA IGCSE 计算机科学大纲要求的计算机体系结构核心概念。了解中央处理器的内部结构和操作是掌握该科目的基础。我们将探讨冯·诺依曼体系结构、CPU 组件、寄存器、总线、取指-解码-执行周期、影响性能的因素和嵌入式系统。

1. The Von Neumann Architecture | 冯·诺依曼体系结构

The Von Neumann architecture is a stored-program concept where both instructions (program code) and data are held in the same read-write memory unit. A single set of buses is used to carry addresses and data between the CPU and memory. While this design enables programs to be modified as easily as data, it creates the ‘Von Neumann bottleneck’ because instructions and data cannot be fetched simultaneously over the shared pathways. The architecture consists of a central processing unit, main memory, input/output mechanisms, and a control unit that orchestrates the entire fetch-decode-execute cycle.

冯·诺依曼体系结构是一种存储程序概念，指令（程序代码）和数据都保存在同一个读写存储器单元中。一组总线用于在 CPU 和内存之间传输地址和数据。虽然这种设计使程序能像数据一样容易修改，但由于指令和数据无法通过共享路径同时获取，因此产生了“冯·诺依曼瓶颈”。该体系结构由中央处理器、主存储器、输入/输出机制以及协调整个取指-解码-执行周期的控制单元组成。

2. CPU Components Overview | CPU 组件概览

The Central Processing Unit (CPU) is the brain of the computer, responsible for carrying out all instructions. Its main internal parts include the Control Unit (CU), the Arithmetic Logic Unit (ALU), a set of registers, and cache memory. They work together in the instruction cycle to process data rapidly. The speed and efficiency of these components determine overall system performance.

中央处理器 (CPU) 是计算机的大脑，负责执行所有指令。其主要内部部件包括控制单元 (CU)、算术逻辑单元 (ALU)、一组寄存器和高速缓存。它们在指令周期中协同工作以快速处理数据。这些组件的速度和效率决定了整体系统性能。

3. The Control Unit (CU) | 控制单元 (CU)

The Control Unit is the director of operations inside the CPU. It fetches each instruction from main memory, decodes it into a set of control signals, and coordinates the actions of the ALU, registers, and memory to execute the instruction. The CU generates timing and control signals, using the system clock to synchronize operations. It manages the flow of data by sending read/write signals and enables the correct sequence of data transfers during each cycle.

控制单元是 CPU 内部操作的指挥者。它从主存取出每条指令，将其解码为一组控制信号，并协调 ALU、寄存器和存储器的行动来执行指令。CU 利用系统时钟生成时序和控制信号以同步操作。它通过发送读/写信号来管理数据流，并在每个周期内确保正确的数据传输顺序。

4. The Arithmetic Logic Unit (ALU) | 算术逻辑单元 (ALU)

The ALU carries out all mathematical calculations and logical operations inside the CPU. It can perform arithmetic operations such as addition, subtraction, and multiplication, and logical operations like AND, OR, NOT, and XOR. The ALU receives data from registers, acts upon it based on control signals from the CU, and stores the result back into a register – often the Accumulator. The ALU is purely combinational; it has no memory of its own and relies on registers for inputs and outputs.

ALU 执行 CPU 内部所有的数学运算和逻辑运算。它可以进行加法、减法、乘法等算术运算，以及 AND、OR、NOT、XOR 等逻辑运算。ALU 从寄存器接收数据，根据 CU 的控制信号对其进行操作，并将结果存回寄存器，通常是累加器。ALU 是完全组合的，它自身没有存储能力，依赖寄存器提供输入和保存输出。

5. CPU Registers | CPU 寄存器

Registers are extremely fast, small storage locations within the CPU that hold temporary data and addresses. They are essential for the fetch-decode-execute cycle. Each register has a specific purpose, and their sizes often relate to the width of the data or address buses.

寄存器是 CPU 内部极快的小型存储位置，保存临时数据和地址。它们对于取指-解码-执行周期至关重要。每个寄存器都有特定的用途，它们的大小通常与数据总线或地址总线的宽度相关。

The Program Counter (PC) holds the memory address of the next instruction to be fetched. It automatically increments to point to

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