📚 Logic Gates for IGCSE WJEC Computer Science | IGCSE WJEC 计算机：逻辑门考点精讲
Logic gates are the fundamental building blocks of digital circuits. In the IGCSE WJEC Computer Science specification, understanding how logic gates process binary signals and how they combine to create complex circuits is essential. This article covers all the key concepts, truth tables, Boolean expressions, and circuit diagrams you need to master.
逻辑门是数字电路的基本构建块。在IGCSE WJEC计算机科学考纲中，理解逻辑门如何处理二进制信号以及它们如何组合成复杂电路至关重要。本文将涵盖你需要掌握的所有关键概念、真值表、布尔表达式和电路图。
1. What Are Logic Gates? | 什么是逻辑门？
Logic gates are electronic devices that take one or more binary inputs and produce a single binary output based on a logical rule. The inputs and outputs can only be in one of two states: 0 (low, false, off) or 1 (high, true, on). Each type of gate implements a specific Boolean function.
逻辑门是一种电子器件，它接收一个或多个二进制输入，并根据一个逻辑规则产生单一的二进制输出。输入和输出只能是两种状态之一：0（低电平、假、关）或1（高电平、真、开）。每一种门都实现一个特定的布尔函数。
In digital systems, logic gates are represented by standard symbols. The WJEC exam expects you to recognise these symbols, draw them, and understand the relationship between the inputs, the gate function, and the output. You will also need to interpret and construct truth tables.
在数字系统中，逻辑门用标准符号表示。WJEC考试要求你识别这些符号、画出它们，并理解输入、门函数和输出之间的关系。你还需要解释和构建真值表。
2. The NOT Gate | 非门
The NOT gate is the simplest logic gate, having only one input. It inverts the signal: if the input is 0, the output is 1; if the input is 1, the output is 0. This operation is also called inversion or complementation.
非门是最简单的逻辑门，只有一个输入。它将信号取反：如果输入是0，输出就是1；如果输入是1，输出就是0。这种操作也称为反转或补运算。
The Boolean expression for a NOT gate is written as Q = NOT A, sometimes shown as Q = A’ or Q = Ā. In a truth table, the output is always the opposite of the input.
非门的布尔表达式写作Q = NOT A，有时表示为Q = A’或Q = Ā。在真值表中，输出总是输入的反值。
| Input A | Output Q = NOT A |
|---|---|
| 0 | 1 |
| 1 | 0 |
3. The AND Gate | 与门
An AND gate has two or more inputs. Its output is 1 only when all inputs are 1. If any input is 0, the output is 0. The AND operation corresponds to logical multiplication.
与门有两个或更多输入。只有当所有输入都为1时，输出才为1。如果任意一个输入为0，输出就是0。与运算对应逻辑乘法。
The Boolean expression for a two-input AND gate is Q = A AND B, often written as Q = A · B or simply Q = AB. The truth table below makes the rule clear.
双输入与门的布尔表达式是Q = A AND B，常写作Q = A · B或简单写成Q = AB。下面的真值表清楚地说明了这一规则。
| A | B | Q = A AND B |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
4. The OR Gate | 或门
An OR gate also has two or more inputs. Its output is 1 if at least one input is 1. The output is 0 only when all inputs are 0. This operation corresponds to logical addition.
或门也有两个或更多输入。如果至少有一个输入为1，输出就是1。只有当所有输入都为0时，输出才是0。该运算对应逻辑加法。
The Boolean expression for a two-input OR gate is Q = A OR B, commonly written as Q = A + B. Note that the plus sign here does not mean arithmetic addition; it is the logical OR operator.
双输入或门的布尔表达式是Q = A OR B，通常写作Q = A + B。请注意，这里的加号不是算术加法，而是逻辑或运算符。
| A | B | Q = A OR B |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
5. The NAND Gate | 与非门
A NAND gate is a combination of an AND gate followed by a NOT gate. Its output is the exact opposite of the AND gate’s output. The NAND gate produces a 1 output for all input combinations except when both inputs are 1 – then the output is 0.
与非门是与门后接一个非门的组合。它的输出正好是与门输出的反值。除了两个输入都为1时输出为0外，与非门在所有其他输入组合下都输出1。
The Boolean expression is Q = NOT (A AND B). Because it is so versatile, the NAND gate is often described as a universal gate: any other logic function can be implemented using only NAND gates.
布尔表达式为Q = NOT (A AND B)。由于用途广泛，与非门常被描述为通用门：仅用与非门就能实现任何其他逻辑函数。
| A | B | Q = A NAND B |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
6. The NOR Gate | 或非门
A NOR gate is an OR gate followed by a NOT gate. Its output is 1 only when all inputs are 0. If any input is 1, the output becomes 0. This gate is also considered a universal gate.
或非门是或门后接非门的组合。只有当所有输入都为0时，输出才为1。如果任意输入为1，输出就变为0。这个门也被认为是一种通用门。
Its Boolean expression is Q = NOT (A OR B). The NOR gate is particularly useful in circuits where a low output should occur when any condition is active. In the WJEC exam, you may be asked to recognise a NOR gate from its truth table or draw its symbol.
它的布尔表达式是Q = NOT (A OR B)。或非门在需要任何条件满足时就产生低电平输出的电路中特别有用。在WJEC考试中，你可能需要从真值表认出或非门或画出其符号。
| A | B | Q = A NOR B |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
7. The XOR Gate | 异或门
The XOR (exclusive OR) gate gives an output of 1 only when an odd number of its inputs are 1. For a two-input XOR gate, the output is 1 if the inputs are different, and 0 if they are the same.
异或门仅当输入中有奇数个1时输出才为1。对于双输入异或门，如果两个输入不同，输出为1；如果相同，输出为0。
The Boolean expression is Q = A XOR B, sometimes written as Q = A ⊕ B. This gate is essential for arithmetic circuits such as half adders and full adders, which you may encounter in the WJEC specification under binary addition circuits.
布尔表达式为Q = A XOR B，有时写作Q = A ⊕ B。该门对于算术电路（如半加器和全加器）至关重要，在WJEC考纲的二进制加法电路中可能会遇到。
| A | B | Q = A XOR B |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
8. The XNOR Gate | 同或门
The XNOR (exclusive NOR) gate is the inverse of the XOR gate. Its output is 1 when the two inputs are equal, and 0 when they are different. It is effectively an XOR gate followed by a NOT gate.
同或门是异或门的反门。当两个输入相等时输出为1，不同时输出为0。它实际上是一个异或门后接一个非门。
The Boolean expression is Q = NOT (A XOR B), often written as Q = A XNOR B. XNOR gates are used in equality comparators and error-detection circuits.
布尔表达式为Q = NOT (A XOR B)，常写作Q = A XNOR B。同或门用于相等比较器和错误检测电路。
| A | B | Q = A XNOR B |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
9. Truth Tables and Boolean Expressions | 真值表与布尔表达式
A truth table is a clear and systematic way to list all possible input combinations for a logic circuit and show the corresponding output. For a circuit with n inputs, the truth table will have 2ⁿ rows. You must be able to complete a truth table for a given logic diagram or Boolean expression.
真值表是一种清晰系统的方法，用于列出一个逻辑电路所有可能的输入组合并显示相应的输出。对于一个有n个输入的电路，真值表将有2ⁿ行。你必须能够根据给定的逻辑图或布尔表达式完成真值表。
Boolean algebra provides a mathematical way to describe and simplify logic circuits. The basic operators are AND (·), OR (+), and NOT ( ‘ or overbar). In the exam, you might be asked to write the Boolean expression for a circuit or simplify an expression using rules like De Morgan’s laws.
布尔代数提供了一种数学方法来描述和简化逻辑电路。基本运算符是AND（·）、OR（+）和NOT（’或上划线）。在考试中，你可能需要写出一个电路的布尔表达式，或者使用德摩根定律等规则来简化表达式。
De Morgan’s laws are particularly important: NOT (A AND B) = (NOT A) OR (NOT B) and NOT (A OR B) = (NOT A) AND (NOT B). These allow you to convert between NAND/NOR forms and simpler expressions.
德摩根定律特别重要：NOT (A AND B) = (NOT A) OR (NOT B) 以及 NOT (A OR B) = (NOT A) AND (NOT B)。这些定律允许你在与非/或非形式与更简单的表达式之间进行转换。
10. Logic Circuit Diagrams | 逻辑电路图
WJEC expects you to draw and interpret logic circuit diagrams using the standard symbols. Each gate is represented by a unique shape: NOT is a triangle with a small circle, AND is a D-shape, OR is a curved shield, NAND and NOR have the same basic shape as AND/OR but with a small inversion bubble at the output, and XOR has an extra curved line on the input side.
WJEC要求你使用标准符号画出并解释逻辑电路图。每个门都由独特的形状表示：非门是一个带小圆圈的三角形，与门是一个D形，或门是一个弧形盾牌形状，与非门和或非门有着与与门/或门相同的基本外形但在输出端有一个小反向圆圈，异或门则在输入端有一条额外的弧形线。
When multiple gates are connected, the output of one gate becomes the input of the next. You must be able to trace signals through a circuit and determine the final output for a given set of inputs. A typical exam question provides a partially completed truth table and asks you to fill in the missing values.
当多个门连接起来时，一个门的输出成为下一个门的输入。你必须能够追踪信号通过电路，并确定给定输入组下的最终输出。典型的考题会提供一个部分完成的真值表，要求你填写缺失的值。
11. Combining Logic Gates: Worked Example | 组合逻辑门：解题示例
Consider a circuit where inputs A and B go into an AND gate, the output of that AND gate is inverted by a NOT gate, and the result is fed into an OR gate along with a separate input C. To find the overall Boolean expression, we build step by step: first, X = A AND B; then Y = NOT X; finally, Q = Y OR C. Substituting gives Q = NOT (A AND B) OR C.
考虑这样一个电路：输入A和B进入一个与门，该与门的输出被一个非门取反，然后其结果与另一个单独的输入C一起送入一个或门。为找到整体布尔表达式，我们逐步构建：首先，X = A AND B；然后，Y = NOT X；最后，Q = Y OR C。代入后得到Q = NOT (A AND B) OR C。
To create the truth table, list all 2³ = 8 combinations of A, B, C. For each row, calculate the intermediate values and the final output. Such exercises test your ability to work methodically and avoid careless mistakes. Practice with different arrangements, for instance using NAND and NOR gates, because these appear frequently.
要创建真值表，列出A、B、C的所有2³ = 8种组合。对每一行，计算中间值和最终输出。这类练习考验你有条不紊地工作并避免粗心错误的能力。运用不同安排进行练习，比如使用与非门和或非门，因为这些门经常出现。
12. Logic Gates in Computing | 逻辑门在计算机中的应用
Logic gates form the heart of the arithmetic logic unit (ALU) inside the CPU. Simple gates are combined to create adders, multiplexers, decoders, and flip-flops. For example, a half adder uses an XOR gate to produce the sum bit and an AND gate to produce the carry bit.
逻辑门构成了CPU内部算术逻辑单元（ALU）的核心。简单的门组合起来可以创建加法器、多路复用器、译码器和触发器。例如，一个半加器使用异或门产生和位，用与门产生进位位。
In the WJEC specification, you may also encounter applications in memory circuits and in simple control systems. Understanding how a given truth table can be implemented with the minimum number of gates teaches you the connection between hardware and logic design. This is a valuable skill not only for the exam but for future studies in computer architecture.
在WJEC考纲中，你可能还会遇到存储电路和简单控制系统中的应用。理解如何用最少数量的门实现给定的真值表，会让你掌握硬件与逻辑设计之间的联系。这不仅是一项有价值的考试技能，也为了日后的计算机体系结构研究打下基础。
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