Boolean Algebra: Key Points for IB OCR Computer Science | IB OCR 计算机：布尔代数考点精讲

📚 Boolean Algebra: Key Points for IB OCR Computer Science | IB OCR 计算机：布尔代数考点精讲

Boolean algebra forms the backbone of digital logic and computer science. In the IB and OCR specifications, you are expected to understand logic gates, truth tables, Boolean expressions, simplification techniques, and how to apply them to circuit design. This article distils the essential concepts you need to master for your exams, with clear explanations and examples.

布尔代数是数字逻辑和计算机科学的基石。在 IB 和 OCR 考纲中，你需要理解逻辑门、真值表、布尔表达式、化简方法以及如何将其应用于电路设计。本文提炼了你必须掌握的核心概念，配有清晰的讲解和例题，助你从容应考。

1. Boolean Variables and Values | 布尔变量与取值

In Boolean algebra, a variable can only take one of two possible values: 0 (FALSE) or 1 (TRUE). These binary states are used to represent the off/on states of a transistor, the flow of current, or the logical outcome of a condition. Always remember that Boolean algebra is a two-valued logic system.

在布尔代数中，变量只能取两个值之一：0（假）或 1（真）。这两个二进制状态用于表示晶体管的关/开、电流的有无或某个条件的逻辑结果。请牢记，布尔代数是一个二值逻辑系统。

Basic operations are defined on these binary values: AND (conjunction), OR (disjunction), and NOT (negation). For AND, the output is 1 only if all inputs are 1. For OR, the output is 1 if at least one input is 1. NOT inverts a single input: 1 becomes 0 and vice versa. These operations are often represented by the symbols ·, +, and an overbar or prime (′) respectively.

基本运算定义在这两个二进制值之上：与（合取）、或（析取）和非（否定）。对于与运算，只有所有输入均为1时，输出才为1。对于或运算，至少有一个输入为1时，输出为1。非运算对单个输入取反：1变0，0变1。这些运算通常分别用符号 ·、+ 和上划线或撇号（′）表示。

2. Basic Logic Gates | 基本逻辑门

Logic gates are the physical implementations of Boolean functions. The three fundamental gates you must know are:

AND gate – output is 1 if both inputs are 1.
OR gate – output is 1 if any input is 1.
NOT gate (inverter) – output is the complement of the input.

逻辑门是布尔函数的物理实现。你必须掌握三种基本门电路：

与门（AND） – 两个输入均为 1 时，输出为 1。
或门（OR） – 任意输入为 1 时，输出为 1。
非门（NOT）（反相器）– 输出为输入的补值。

From these, derived gates such as NAND, NOR, XOR (exclusive OR) and XNOR are formed. NAND is an AND followed by a NOT, and it is functionally complete – any Boolean function can be built using only NAND gates. Similarly, NOR is functionally complete. The XOR gate outputs 1 if the inputs are different, and XNOR outputs 1 if they are equal. Be able to draw, recognise, and write truth tables for all these gates.

由基本门还可以构成派生门，如与非门（NAND）、或非门（NOR）、异或门（XOR）和同或门（XNOR）。NAND 是与门后接非门，它是功能完备的，即任何布尔函数都可以只用 NAND 门实现。同样，NOR 也是功能完备的。异或门在输入相异时输出 1，同或门在输入相同时输出 1。你要能够画出、识别这些门的符号，并写出它们的真值表。

3. Truth Tables | 真值表

A truth table lists every possible combination of input values and the corresponding output of a Boolean expression or logic circuit. For n input variables, there are 2ⁿ rows. You must be systematic: usually, inputs are written in binary counting order from 0 to 2ⁿ−1. This ensures no combination is missed.

真值表列出了输入变量的每一种可能组合以及布尔表达式或逻辑电路的相应输出值。对于 n 个输入变量，共有 2ⁿ 行。你必须系统地书写：通常按二进制计数顺序从 0 到 2ⁿ−1 排列输入，以确保不遗漏任何组合。

For example, a two‑input AND gate truth table:

A	B	A · B
0	0	0
0	1	0
1	0	0
1	1	1

例如，一个两输入与门的真值表：

A	B	A · B
0	0	0
0	1	0
1	0	0
1	1	1

Truth tables are also the starting point for deriving Boolean expressions in Sum‑of‑Products (SOP) form, by OR‑ing all rows where the output is 1.

真值表也是推导积之和（SOP）形式布尔表达式的起点，方式是将所有输出为 1 的行进行逻辑或运算。

4. Boolean Identities and Laws | 布尔恒等式与定律

A set of fundamental identities allows you to manipulate and simplify Boolean expressions. The most important laws are:

Identity Law: A + 0 = A, A · 1 = A
Null Law: A + 1 = 1, A · 0 = 0
Idempotent Law: A + A = A, A · A = A
Complement Law: A + A′ = 1, A · A′ = 0
Involution Law: (A′)′ = A
Commutative Law: A + B = B + A, A · B = B · A
Associative Law: (A + B) + C = A + (B + C), (A · B) · C = A · (B · C)
Distributive Law: A · (B + C) = A·B + A·C, A + (B·C) = (A+B) · (A+C)

一组基本恒等式让你能够操作并化简布尔表达式。最重要的定律有：

同一律： A + 0 = A，A · 1 = A
零律： A + 1 = 1，A · 0 = 0
幂等律： A + A = A，A · A = A
互补律： A + A′ = 1，A · A′ = 0
双重否定律： (A′)′ = A
交换律： A + B = B + A，A · B = B · A
结合律： (A + B) + C = A + (B + C)，(A · B) · C = A · (B · C)
分配律： A · (B + C) = A·B + A·C，A + (B·C) = (A+B) · (A+C)

You must also know Absorption Laws: A + A·B = A, and A · (A + B) = A. These are frequently tested in simplification questions. Practice applying these laws step‑by‑step to reduce complex expressions.

你还必须掌握吸收律：A + A·B = A，以及 A · (A + B) = A。这些在化简题中经常考查。请逐步练习运用这些定律来化简复杂表达式。

5. Algebraic Simplification | 代数化简

Simplifying a Boolean expression reduces the number of gates needed in a circuit, saving cost and power. The process involves applying the laws from the previous section to remove redundant terms or literals. For example, to simplify A·B + A·B′, you can factor A: A·(B + B′) = A·1 = A.

化简布尔表达式可以减少电路中所需门的数量，从而节省成本和功耗。化简过程就是运用上节的定律来消除冗余项或文字。例如，化简 A·B + A·B′，可提取公因子 A：A·(B + B′) = A·1 = A。

Always look for opportunities to use the complement law (X + X′ = 1) and absorption. A common exam question presents an expression like (A + B)·(A + B′) and asks you to prove it equals A. Using distributivity: (A + B)·(A + B′) = A + (B·B′) = A + 0 = A. Show your working clearly, listing the law used at each step.

务必寻找机会使用互补律（X + X′ = 1）和吸收律。考试常见题型是给出表达式如 (A + B)·(A + B′)，要求证明它等于 A。运用分配律：(A + B)·(A + B′) = A + (B·B′) = A + 0 = A。清晰地展示运算过程，每一步列出所使用的定律。

Another simplification technique is converting to a standard SOP form, then applying the rule A + A = A to merge minterms that differ by exactly one variable. This leads naturally to Karnaugh maps.

另一种化简技巧是转化为标准积之和形式，然后利用 A + A = A 合并仅相差一个变量的最小项。这很自然地引出卡诺图。

6. Karnaugh Maps (K‑Maps) | 卡诺图

Karnaugh maps provide a visual method to simplify Boolean expressions for up to four variables (and sometimes five or six, but exams usually stick to 2–4). A K‑map is a grid where each cell represents a minterm, arranged so that adjacent cells differ by only one variable. Groups of 1s of size 1, 2, 4, 8 (powers of 2) are identified and looped, with each group corresponding to a simplified product term.

卡诺图为最多四个变量（有时五或六个，但考试通常限制在 2-4 个）的布尔表达式提供了一种可视化简方法。卡诺图是一个网格，每个单元格代表一个最小项，其排列方式使得相邻单元格仅相差一个变量。识别并圈起大小为 2 的幂次（1, 2, 4, 8）的 1 的组块，每个组块对应一个简化的乘积项。

When constructing a K‑map for 3 variables (A, B, C), the rows could be A (0,1) and columns BC (00,01,11,10) in Gray code order. For 4 variables, use AB for rows and CD for columns, again in Gray code. Remember that the map is toroidal – the top row is adjacent to the bottom, and the left column adjacent to the right. Always form the largest possible groups, and ensure all 1s are covered. Groups may overlap, which often leads to a simpler overall expression.

在构建三变量（A, B, C）卡诺图时，行可以用 A（0,1），列用 BC（00, 01, 11, 10）按格雷码排列。对于四变量，行用 AB，列用 CD，同样使用格雷码。记住卡诺图是环面的——顶行与底行相邻，左列与右列相邻。务必组成尽可能大的组，并确保所有 1 都被覆盖。组之间可以重叠，重叠往往能获得更简化的最终表达式。

The final expression is the OR of the terms derived from each group. Practice translating between truth tables, expressions, and K‑maps; it is a core skill for the exam.

最终的表达式是各分组所得项的或运算。练习在真值表、表达式和卡诺图之间相互转换，这是考试的核心技能。

7. De Morgan’s Theorems | 德摩根定理

De Morgan’s theorems are essential for transforming expressions and for implementing circuits with specific gate types. The two theorems state:

(A · B)′ = A′ + B′

(A + B)′ = A′ · B′

德摩根定理对于变换表达式以及用特定门类型实现电路至关重要。两个定理表述如下：

(A · B)′ = A′ + B′

(A + B)′ = A′ · B′

In words: the complement of an AND is the OR of the complements; the complement of an OR is the AND of the complements. These theorems are used to push inversion bubbles through circuits, convert between SOP and POS forms, and prove the equivalence of different logic networks. A typical question might ask you to implement a function using only NAND gates. By applying De Morgan’s theorem, you can replace an AND‑OR structure with all NAND gates.

用语言表述：与运算的补等于补的或运算；或运算的补等于补的与运算。这些定理用于将反相气泡推过电路、在 SOP 和 POS 形式间转换，以及证明不同逻辑网络的等效性。典型考题可能是要求只用与非门实现某函数。通过应用德摩根定理，你可以用全与非门替代与-或结构。

8. Logic Circuit Diagrams | 逻辑电路图

You need to be able to draw logic circuits from Boolean expressions and derive expressions from given diagrams. Standard symbols for gates (ANSI/IEC) should be used, but the exam will accept either the distinctive‑shape symbols (AND: D‑shape, OR: crescent) or the rectangular IEC symbols. Consistency and clarity are key.

你需要能够根据布尔表达式画出逻辑电路图，也能从给定的电路图推导出表达式。应使用标准门符号（ANSI/IEC），但考试中既接受独特形状符号（与门：D 形，或门：月牙形），也接受矩形 IEC 符号。保持清晰一致是关键。

When drawing, label inputs and outputs. For multi‑level circuits, intermediate signals can be annotated. Always double‑check the number of inputs per gate, and note that NOT gates (inverters) are often drawn as a triangle with a bubble. In questions about propagation delays or gate counts, understand that a simpler Boolean expression often leads to a faster, cheaper circuit.

画图时要标注输入和输出。对于多级电路，可标注中间信号。务必核对每个门的输入数量，注意非门（反相器）通常画成带小圆圈的三角形。在涉及传播延迟或门数的问题中，要明白更简单的布尔表达式通常能产生更快、成本更低的电路。

9. Half and Full Adders | 半加器与全加器

Adders are a classic application of Boolean algebra. A half adder adds two single bits, producing a Sum and a Carry. The Boolean equations are:

Sum = A XOR B Carry = A · B

加法器是布尔代数的经典应用。半加器将两个一位二进制数相加，产生和与进位。布尔方程如下：

Sum = A XOR B Carry = A · B

A full adder adds three bits (two operands and a carry‑in) and outputs a sum and carry‑out. The logic is:

Sum = A XOR B XOR C_in

C_out = (A · B) + (C_in · (A XOR B))

全加器将三个位相加（两个操作数和一个进位输入），输出和与进位输出。逻辑为：

Sum = A XOR B XOR C_in

C_out = (A · B) + (C_in · (A XOR B))

You should be able to construct the truth table for a full adder (8 rows), draw its logic diagram using two half adders and an OR gate, and explain how multiple full adders are cascaded to form a ripple‑carry adder for multi‑bit numbers. This topic often links Boolean algebra to computer architecture.

你应能构建全加器的真值表（8 行），画出用两个半加器和一个或门实现的逻辑图，并解释如何将多个全加器级联构成多位数的行波进位加法器。该主题常将布尔代数与计算机体系结构联系起来。

10. Simplifying with XOR and XNOR | 异或与同或的化简

The XOR operation (⊕) and XNOR (⊙) appear frequently. Recognising their patterns can significantly shorten your simplifications. Key identities include:

A ⊕ 0 = A
A ⊕ 1 = A′
A ⊕ A = 0
A ⊕ A′ = 1
A ⊕ B = B ⊕ A (commutative)
(A ⊕ B) ⊕ C = A ⊕ (B ⊕ C) (associative)

异或运算（⊕）和同或运算（⊙）出现得很频繁。识别它们的模式能大幅缩短化简过程。重要恒等式包括：

A ⊕ 0 = A
A ⊕ 1 = A′
A ⊕ A = 0
A ⊕ A′ = 1
A ⊕ B = B ⊕ A（交换律）
(A ⊕ B) ⊕ C = A ⊕ (B ⊕ C)（结合律）

For XNOR, A ⊙ B = (A ⊕ B)′ = A′·B′ + A·B. Knowing these identities helps you reduce functions like F = A ⊕ A·B directly without expanding into minterms.

对于同或，A ⊙ B = (A ⊕ B)′ = A′·B′ + A·B。熟悉这些恒等式有助于直接化简诸如 F = A ⊕ A·B 的函数，而无需展开成最小项。

11. Exam Technique and Common Pitfalls | 考试技巧与常见错误

Many students lose marks by not reading the question carefully. If the question asks for a Sum‑of‑Products, do not give a factored Product‑of‑Sums unless required. Always check that your final circuit uses the allowed gate types (e.g., only NAND gates). When simplifying with K‑maps, do not forget to include ‘don’t care’ conditions (denoted by X) if provided – they can be treated as 1 or 0 to make larger groups.

许多学生因审题不仔细而丢分。如果题目要求写出“积之和”形式，不要给出因式分解的“和之积”形式，除非题目明确要求。务必检查最终电路是否使用了规定的门类型（如仅用与非门）。用卡诺图化简时，若提供了“无关项”（用 X 表示），不要忘记利用它们——它们可被视为 1 或 0 以构成更大的组。

Another pitfall is misapplying De Morgan’s theorem. Remember to change the operator and invert all variables. For example, (A′·B)′ becomes A + B′, not A′ + B. Write down each step and law to show your reasoning; even if the final answer is slightly wrong, you can gain method marks. Always double‑check truth tables for complete coverage of input combinations.

另一个易错点是误用德摩根定理。记住要改变运算符并对所有变量取反。例如 (A′·B)′ 变成 A + B′，而不是 A′ + B。写出每一步及所用定律以展示推理过程；即使最终答案稍有差错，也能获得方法分。务必仔细检查真值表是否涵盖了所有输入组合。

12. Summary of Key Conversions | 关键转换总结

Being fluent in moving between representations is essential. Here is a quick summary:

Truth table → Expression: Write the minterms for each output‑1 row and OR them (SOP). For POS, write maxterms for output‑0 rows and AND them.
Expression → Truth table: Evaluate the expression for all input combinations.
Expression → Circuit: Draw gates corresponding to the operators, following precedence (NOT before AND before OR, unless parentheses dictate otherwise).
Circuit → Expression: Work from inputs to output, labelling intermediate points, and combine.
K‑map → Expression: Loop groups of 1s and write the simplified SOP; or loop 0s for POS.

熟练在不同表示法间转换至关重要。快速总结如下：

真值表 → 表达式：写出每个输出为 1 的行对应的最小项，并将其相或（SOP）。对于 POS，写出输出为 0 的行对应的最大项，并将其相与。
表达式 → 真值表：对所有输入组合计算表达式的值。
表达式 → 电路图：根据运算符画出对应的门，遵循优先级（非先于与，与先于或，除非括号另有规定）。
电路图 → 表达式：从输入到输出逐级推导，标注中间点，然后合并。
卡诺图 → 表达式：圈起 1 的组，写出简化的 SOP；或圈起 0 得到 POS。

Mastering these conversions and the underlying Boolean principles will not only prepare you for direct questions but also enhance your understanding of digital systems in the wider syllabus.

掌握这些转换方法及底层的布尔原理，不仅能应对直接考题，还能加深你对考纲中数字系统的整体理解。

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Boolean Algebra: Key Points for IB OCR Computer Science | IB OCR 计算机：布尔代数考点精讲