📚 IB CIE Computer Science: Computer Architecture Exam Essentials | IB CIE 计算机：计算机体系结构 考点精讲
Computer architecture forms the foundational backbone of all computing systems. It explores how the central processing unit (CPU), memory, input/output devices, and buses work together to execute instructions efficiently. In the IB and CIE Computer Science syllabi, understanding these core concepts is essential for tackling questions on system performance, data flow, and hardware organisation.
计算机体系结构构成了所有计算系统的基础。它探讨中央处理器（CPU）、存储器、输入/输出设备以及总线如何协同工作以高效执行指令。在 IB 和 CIE 计算机科学课程中，理解这些核心概念对于回答有关系统性能、数据流和硬件组织的问题至关重要。
1. The Von Neumann Architecture | 冯·诺依曼体系结构
The Von Neumann architecture describes a stored-program concept where both data and instructions are held in the same memory unit and accessed via a shared bus system. This design, used in most general-purpose computers, consists of a control unit, an arithmetic logic unit (ALU), memory, input, and output. The key limitation is the Von Neumann bottleneck: the single pathway between CPU and memory limits the speed of data transfer.
冯·诺依曼体系结构描述了一种存储程序概念，即数据和指令都保存在同一个存储单元中，并通过共享总线系统访问。这种设计用于大多数通用计算机，由控制单元、算术逻辑单元（ALU）、存储器、输入和输出组成。其关键局限是冯·诺依曼瓶颈：CPU 与存储器之间的单一通路限制了数据传输的速度。
2. CPU Components and Their Functions | CPU 组件及其功能
The CPU is the brain of the computer. It consists of the Control Unit (CU), which directs operations and decodes instructions, the Arithmetic Logic Unit (ALU), which performs arithmetic and logical calculations, and a set of registers. Key registers include the Program Counter (PC) holding the address of the next instruction, the Memory Address Register (MAR), the Memory Data Register (MDR), the Current Instruction Register (CIR), and the Accumulator (ACC) for temporary data storage.
CPU 是计算机的大脑。它由控制单元（CU）——指挥操作并译码指令，算术逻辑单元（ALU）——执行算术和逻辑计算，以及一组寄存器组成。关键寄存器包括：程序计数器（PC）存放下一条指令的地址、存储器地址寄存器（MAR）、存储器数据寄存器（MDR）、当前指令寄存器（CIR）以及用于临时数据存储的累加器（ACC）。
3. The Fetch–Decode–Execute Cycle | 取指–译码–执行周期
Every instruction is processed through the fetch–decode–execute cycle. In the fetch stage, the PC contains the address of the next instruction. This address is copied to the MAR and sent via the address bus to memory. The instruction at that address is retrieved into the MDR and then copied to the CIR. The PC is incremented to point to the next instruction. During decode, the CU interprets the instruction in the CIR. In the execute stage, data may be loaded from memory, the ALU may perform an operation, and the result is stored in the accumulator or sent back to memory.
每条指令都通过取指–译码–执行周期进行处理。在取指阶段，PC 包含下一条指令的地址。该地址被复制到 MAR 并通过地址总线发送到存储器。该地址处的指令被取入 MDR，然后复制到 CIR。PC 递增以指向下一条指令。在译码阶段，CU 解释 CIR 中的指令。在执行阶段，可能从存储器加载数据，ALU 可能执行运算，结果存储在累加器或送回存储器。
4. Factors Affecting CPU Performance | 影响 CPU 性能的因素
CPU performance is determined by clock speed, measured in Hertz, indicating cycles per second. A higher clock speed means more instructions can be processed in a given time. The number of cores also matters: multiple cores allow true parallel execution of instructions. Cache size and architecture significantly affect speed; a larger, faster cache reduces the time the CPU waits for data from main memory. Additionally, the word size (e.g., 32-bit or 64-bit) determines how much data can be handled at once, and instruction set design influences how efficiently tasks are executed.
CPU 性能由时钟速度决定，以赫兹为单位，表示每秒周期数。时钟速度越高，意味着给定时间内可处理更多的指令。核心数量也很重要：多个核心允许多条指令真正并行执行。缓存大小和架构对速度影响显著；更大更快的缓存减少了 CPU 等待主存储器数据的时间。此外，字长（如 32 位或 64 位）决定了可一次处理多少数据，而指令集设计则影响任务执行的效率。
5. Primary Memory: RAM and ROM | 主存储器：RAM 与 ROM
Random Access Memory (RAM) is volatile memory used to store data and instructions currently in use. It can be read from and written to, and its contents are lost when power is turned off. Read-Only Memory (ROM) is non-volatile, holding essential instructions such as the BIOS/boot firmware. Its contents are retained without power and typically cannot be modified by normal computer operation. Both are directly accessible by the CPU.
随机存取存储器（RAM）是一种易失性存储器，用于存储当前正在使用的数据和指令。它既可读也可写，断电后内容丢失。只读存储器（ROM）是非易失性的，保存基本指令，如 BIOS/引导固件。其内容在无电源时保留，通常不能被普通计算机操作修改。两者均可被 CPU 直接访问。
| Feature / 特性 | RAM | ROM |
|---|---|---|
| Volatility / 易失性 | Volatile / 易失 | Non-volatile / 非易失 |
| Read/Write / 读写 | Read and Write / 可读可写 | Typically Read-only / 通常只读 |
| Typical Use / 典型用途 | Active programs and data / 活动程序与数据 | Boot firmware / 引导固件 |
6. Cache Memory | 高速缓存
Cache memory is a small, high-speed memory located inside or very close to the CPU. It stores frequently accessed data and instructions to reduce the average time needed to access main memory. Modern CPUs often have multiple levels of cache: L1 (fastest, smallest, integrated per core), L2 (larger, slightly slower, per core or shared), and L3 (shared among all cores, larger and slower than L2). The principle of locality (temporal and spatial) ensures cache effectiveness.
高速缓存是一种位于 CPU 内部或非常接近 CPU 的小型高速存储器。它存储频繁访问的数据和指令，以减少访问主存储器的平均时间。现代 CPU 通常具有多级缓存：L1（最快、最小、每核心集成）、L2（更大、稍慢、每核心或共享）以及 L3（所有核心共享，比 L2 更大且更慢）。局部性原理（时间局部性和空间局部性）确保了缓存的有效性。
7. Secondary Storage | 辅助存储器
Secondary storage provides permanent, non-volatile storage. Hard disk drives (HDDs) use magnetic platters and mechanical arms, offering large capacities at low cost but slower access times. Solid-state drives (SSDs) use NAND flash memory, providing much faster read/write speeds, lower power consumption, and greater durability because they have no moving parts. Optical storage (CD, DVD, Blu-ray) uses lasers to read/write data and is often used for distributing software or media. Cloud storage is increasingly popular, offering remote access and scalability.
辅助存储器提供永久的非易失性存储。硬盘驱动器（HDD）使用磁盘片和机械臂，容量大、成本低，但访问时间较慢。固态驱动器（SSD）使用 NAND 闪存，提供快得多的读写速度、更低的功耗和更高的耐用性，因为没有移动部件。光存储（CD、DVD、蓝光）使用激光读写数据，通常用于分发软件或媒体。云存储日益流行，提供远程访问和可扩展性。
8. Input/Output Systems | 输入/输出系统
Input/Output (I/O) devices connect the computer to the external world. Input devices (keyboard, mouse, sensors, microphone) convert physical actions or analogue signals into digital data. Output devices (monitor, printer, speakers) present data from the computer in a human-readable form. I/O controllers manage data transfer between the CPU and peripherals, using ports such as USB, HDMI, or wireless interfaces. Direct Memory Access (DMA) allows certain hardware subsystems to access main memory independently of the CPU, speeding up large data transfers.
输入/输出（I/O）设备将计算机与外部世界连接起来。输入设备（键盘、鼠标、传感器、麦克风）将物理操作或模拟信号转换为数字数据。输出设备（监视器、打印机、扬声器）以人类可读的形式呈现来自计算机的数据。I/O 控制器管理 CPU 与外设之间的数据传输，使用 USB、HDMI 或无线接口等端口。直接内存访问（DMA）允许某些硬件子系统独立于 CPU 访问主存储器，从而加速大规模数据传输。
9. Buses and Data Transfer | 总线与数据传输
Buses are communication pathways that carry data, addresses, and control signals between components. The address bus is unidirectional (from CPU to memory/I/O) and carries the location addresses. Its width determines the maximum addressable memory (e.g., 32 address lines can address 2³² memory locations). The data bus is bidirectional, carrying the actual data being transferred. The control bus sends timing and control signals such as read/write lines, interrupt requests, and clock signals. Synchronisation is managed by the system clock.
总线是在组件之间传输数据、地址和控制信号的通信通路。地址总线是单向的（从 CPU 到存储器/I/O），携带位置地址。其宽度决定了最大可寻址内存（例如，32 根地址线可寻址 2³² 个存储单元）。数据总线是双向的，携带实际传输的数据。控制总线发送定时和控制信号，如读/写线、中断请求和时钟信号。同步由系统时钟管理。
10. Pipelining | 流水线技术
Pipelining is a technique that improves CPU throughput by overlapping the execution of multiple instructions. While one instruction is being executed, the next can be decoded and the following one fetched. This is analogous to an assembly line. However, pipeline hazards (data, control, and structural) can cause stalls. Data hazards occur when an instruction depends on the result of a previous instruction not yet completed. Branch prediction helps mitigate control hazards by guessing the outcome of conditional operations.
流水线是一种通过重叠执行多条指令来提高 CPU 吞吐量的技术。当一条指令正在执行时，下一条可以译码，再下一条可以取指。这类似于流水线装配。然而，流水线冒险（数据冒险、控制冒险和结构冒险）可能导致停顿。数据冒险发生在一个指令依赖于前一条尚未完成指令的结果时。分支预测通过猜测条件操作的结果来帮助减轻控制冒险。
11. Embedded Systems | 嵌入式系统
An embedded system is a dedicated computer system designed for a specific function within a larger mechanical or electronic system. Unlike general-purpose computers, they often have real-time computing constraints and limited resources. Examples include microcontrollers in washing machines, automotive engine control units, and medical devices. They typically integrate a processor, memory, and I/O peripherals on a single chip (SoC) and run firmware that is rarely updated. Their design focuses on low power consumption, reliability, and minimal cost.
嵌入式系统是一种专用计算机系统，设计用于在更大的机械或电子系统中执行特定功能。与通用计算机不同，它们通常具有实时计算约束和有限的资源。示例包括洗衣机中的微控制器、汽车发动机控制单元和医疗设备。它们通常将处理器、存储器和 I/O 外设集成在单个芯片（SoC）上，并运行很少更新的固件。其设计侧重于低功耗、可靠性和最低成本。
12. Summary and Exam Tips | 总结与考试技巧
When tackling computer architecture questions, always relate components to the fetch–decode–execute cycle and the flow of data along buses. Use precise terminology: distinguish between MAR and MDR, RAM and ROM, and discuss the impact of cache misses. For performance questions, link clock speed, cores, and cache size to execution time. Diagrams of CPU internal structure and bus connections are common and should be labelled clearly. Finally, understand the differences between Von Neumann and Harvard architectures (Harvard uses separate memory for instructions and data, addressing the bottleneck issue).
回答计算机体系结构问题时，务必将组件与取指–译码–执行周期以及沿总线的数据流联系起来。使用精确的术语：区分 MAR 与 MDR、RAM 与 ROM，并讨论缓存未命中的影响。对于性能问题，将时钟速度、核心数和缓存大小与执行时间联系起来。CPU 内部结构和总线连接示意图很常见，应清晰标注。最后，理解冯·诺依曼架构与哈佛架构之间的区别（哈佛架构使用单独的指令存储器和数据存储器，解决了瓶颈问题）。
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