Memory | 存储器考点精讲

📚 Memory | 存储器考点精讲

In computer science, ‘memory’ refers to the physical devices used to store programs and data on a temporary or permanent basis. Understanding memory is fundamental not only for IB and WJEC exams but also for grasping how a computer executes instructions. This revision guide covers all key memory concepts, from primary and secondary storage to caching, virtual memory, and memory hierarchy.

在计算机科学中，“存储器”指用于临时或永久存储程序和数据的物理设备。理解存储器不仅对 IB 和 WJEC 考试至关重要，也有助于掌握计算机执行指令的原理。本考点精讲涵盖所有核心存储器概念，从主存储器和辅助存储器到高速缓存、虚拟内存和存储层次结构。

1. What is Computer Memory? | 计算机存储器是什么？

Computer memory is any physical device capable of storing information temporarily or permanently. It holds data and instructions that the central processing unit (CPU) needs to operate. Memory can be volatile, meaning it loses its contents when power is turned off, or non-volatile, retaining data without power.

计算机存储器是任何能够临时或永久存储信息的物理设备，用于存放中央处理器（CPU）运行时所需的数据和指令。存储器可分为易失性（断电后内容丢失）和非易失性（断电后仍能保留数据）。

2. Primary vs Secondary Memory | 主存储器与辅助存储器

Primary memory, also called main memory, is directly accessible by the CPU. It includes RAM and ROM. Secondary memory is not directly accessible by the CPU; data must first be transferred to primary memory. Examples are hard disk drives (HDD), solid-state drives (SSD), and USB flash drives.

主存储器（也称为内存）可由 CPU 直接访问，包括 RAM 和 ROM。辅助存储器无法由 CPU 直接访问；数据需先传输到主存储器。例如硬盘（HDD）、固态硬盘（SSD）和 U 盘。

3. RAM – Dynamic and Static | 随机存取存储器：动态与静态

RAM (Random Access Memory) is volatile and used for storing data and machine code currently being used. DRAM (Dynamic RAM) stores each bit in a tiny capacitor and transistor; it must be refreshed thousands of times per second. SRAM (Static RAM) uses flip-flop circuits, is faster and more expensive, and does not need refreshing. DRAM is typically used for main memory, while SRAM is used for cache memory.

RAM（随机存取存储器）是易失性的，用于存储当前正在使用的数据和机器码。DRAM（动态 RAM）使用微型电容和晶体管存储每个比特，必须每秒刷新数千次。SRAM（静态 RAM）采用触发器电路，速度更快、成本更高，且无需刷新。DRAM 通常用作主内存，SRAM 则用于高速缓存。

DRAM: higher density, cheaper, slower, requires refresh
DRAM：密度更高、更便宜、速度较慢、需要刷新
SRAM: lower density, expensive, faster, no refresh
SRAM：密度较低、昂贵、速度更快、无需刷新

4. ROM and Types of Read-Only Memory | 只读存储器及其类型

ROM is non-volatile and stores firmware or the BIOS (Basic Input/Output System). Classic ROM is programmed at manufacture and cannot be altered. PROM (Programmable ROM) can be written once. EPROM (Erasable Programmable ROM) can be erased using ultraviolet light. EEPROM (Electrically Erasable Programmable ROM) can be erased and reprogrammed electrically, allowing individual bytes to be altered.

ROM 是非易失性的，用于存储固件或 BIOS（基本输入输出系统）。传统 ROM 在制造时编程，不可更改。PROM（可编程 ROM）可一次写入。EPROM（可擦除可编程 ROM）可使用紫外线擦除。EEPROM（电可擦除可编程 ROM）可通过电方式擦除和重新编程，允许改写单个字节。

5. Cache Memory: Levels, Hits and Misses | 高速缓存：层级、命中和缺失

Cache memory is a small, fast type of volatile memory located close to the CPU. It stores frequently accessed data and instructions to reduce average access time. Modern CPUs have multiple levels: L1 (fastest, smallest), L2, and L3 (larger, slower). A cache hit occurs when data is found in the cache; a miss requires fetching from a lower level or main memory. Higher hit rates significantly improve performance.

高速缓存是一种容量小、速度快的易失性存储器，紧邻 CPU，用于存放频繁访问的数据和指令，以缩短平均访问时间。现代 CPU 拥有多级缓存：L1（最快、最小）、L2 和 L3（更大、更慢）。当所需数据在缓存中找到时，称为缓存命中；若缺失，则需从更低层级或主存中获取。高命中率能显著提升性能。

6. Virtual Memory and Paging | 虚拟内存与分页

Virtual memory extends the apparent size of main memory by using a portion of secondary storage (e.g., HDD or SSD) as if it were RAM. When RAM is full, the operating system moves inactive pages of memory to a swap file or page file. Paging divides memory into fixed-size blocks called pages. A page fault occurs when a needed page is not in RAM, triggering a swap from disk. Excessive paging causes thrashing, severely slowing the system.

虚拟内存通过将部分辅助存储器（如硬盘或 SSD）当作 RAM 使用，来扩展主存的可用容量。当 RAM 满时，操作系统将不活跃的内存页移动到交换文件或页面文件。分页技术将内存划分为固定大小的块，称为页。当所需页面不在 RAM 中时发生缺页，触发从磁盘换入。过度分页会造成系统颠簸，严重拖慢速度。

7. Memory Hierarchy | 存储层次结构

The memory hierarchy organises storage types by speed, cost, and capacity. From fastest and most expensive to slowest and cheapest: registers inside the CPU, cache (L1, L2, L3), main memory (RAM), and secondary storage (HDD, SSD). Registers offer the fastest access but are extremely limited in size. The goal is to balance performance and cost.

存储层次结构根据速度、成本和容量组织存储类型。从最快、最昂贵到最慢、最便宜：CPU 内部的寄存器、高速缓存（L1、L2、L3）、主内存（RAM）以及辅助存储器（HDD、SSD）。寄存器提供最快访问速度，但容量极为有限。设计目标是在性能与成本之间取得平衡。

Level	Technology	Typical Size	Access Time
1	Registers	Bytes	≈ 1 ns
2	Cache (SRAM)	KB – MB	1–10 ns
3	Main Memory (DRAM)	GB	50–100 ns
4	SSD / HDD	TB+	0.1–10 ms

8. Memory and the Fetch-Decode-Execute Cycle | 存储器与取指-译码-执行周期

The CPU repeatedly carries out the fetch-decode-execute cycle. In the fetch phase, the address of the next instruction is placed on the address bus, and the instruction is retrieved from memory (RAM) via the data bus. The instruction is then decoded and executed. Operands may also be read from or written to memory, using memory address register (MAR) and memory data register (MDR). This illustrates why fast, reliable memory is essential for system performance.

CPU 不断重复取指-译码-执行周期。在取指阶段，下一条指令的地址被放置在地址总线上，通过数据总线从存储器（RAM）中取出指令。随后指令被译码并执行。操作数也可能需要从存储器读取或写入，使用内存地址寄存器（MAR）和内存数据寄存器（MDR）。这说明快速可靠的存储器对系统性能至关重要。

9. Secondary Storage Devices: HDDs vs SSDs vs Optical | 辅助存储设备：HDD、SSD 与光盘

Hard disk drives (HDD) use spinning magnetic platters and a moving read/write head, offering high capacity at low cost but with mechanical latency. Solid-state drives (SSD) use NAND flash memory, providing much faster access, no moving parts, and lower power consumption. Optical discs (CD, DVD, Blu-ray) use lasers to read pits and lands; they are portable but slower and limited in capacity.

硬盘驱动器（HDD）使用旋转磁性盘片和移动读写头，提供大容量、低成本，但存在机械延迟。固态硬盘（SSD）采用 NAND 闪存，访问速度更快、无活动部件、功耗更低。光盘（CD、DVD、蓝光）利用激光读取凹坑和平面；它们便携，但速度较慢且容量有限。

10. Memory Addressing and Data Transfer | 存储器寻址与数据传输

Memory locations are identified by unique addresses. The width of the address bus determines the maximum addressable memory: a system with n address lines can address 2ⁿ unique locations. For example, a 32-bit address bus can address up to 2³² memory cells (4 GB). Data is transferred via the data bus, and control signals coordinate the operation. The formula for addressable memory is often expressed as:

存储器单元由唯一的地址标识。地址总线的宽度决定了最大可寻址内存：具有 n 条地址线的系统可寻址 2ⁿ 个唯一单元。例如，32 位地址总线最多可寻址 2³² 个内存单元（4 GB）。数据通过数据总线传输，控制信号协调整个过程。可寻址内存的计算公式常表示为：

Addressable locations = 2ⁿ, where n = number of address lines

可寻址单元数 = 2ⁿ，其中 n 为地址线数量

11. Memory Performance Metrics | 存储器性能指标

Key metrics include latency (access time) and bandwidth (data transfer rate). Latency is the delay between initiating a request and receiving the data. Bandwidth is the amount of data that can be transferred per second, often measured in GB/s. For RAM, DDR (Double Data Rate) generations (DDR4, DDR5) increase bandwidth by transferring data on both clock edges. CAS latency (Column Access Strobe latency) is a crucial timing parameter in DRAM modules.

关键指标包括延迟（访问时间）和带宽（数据传输速率）。延迟是从发起请求到接收数据之间的时间差。带宽是每秒可传输的数据量，通常以 GB/s 为单位。对于 RAM，DDR（双倍数据速率）各代产品（DDR4、DDR5）通过在时钟信号的上升沿和下降沿都传输数据来提高带宽。CAS 延迟（列访问选通延迟）是 DRAM 模块中至关重要的时序参数。

12. Exam Tips and Common Pitfalls | 考试技巧与常见误区

IB and WJEC exam questions often ask students to distinguish between RAM and ROM, explain why virtual memory is needed, or compare SSD and HDD. A common pitfall is confusing volatile with non-volatile storage or assuming that adding more RAM will always speed up a computer. Remember that beyond a certain point, benefits diminish, and a slow CPU or disk can be the bottleneck. Use precise terminology: ‘volatile’, ‘non-volatile’, ‘cache hit’, ‘page fault’, ‘address bus width’. Always justify with technical reasoning.

IB 和 WJEC 考试中常要求学生区分 RAM 和 ROM、解释为何需要虚拟内存，或比较 SSD 与 HDD。常见误区包括混淆易失性与非易失性存储器，或误以为增加更多 RAM 总会加快电脑速度。记住，超过一定限度后，效益会递减，慢速 CPU 或硬盘可能成为瓶颈。请使用准确术语，如“挥发性”、“非挥发性”、“缓存命中”、“缺页”、“地址总线宽度”，并始终用技术原理加以论证。

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Memory | 存储器 考点精讲