📚 Logic Gates Revision for GCSE AQA Computer Science | GCSE AQA 计算机：逻辑门 考点精讲
Logic gates are the fundamental building blocks of digital circuits inside a computer. They process binary inputs (0 or 1) and produce a single binary output based on a specific logical operation. In the AQA GCSE Computer Science specification, you are expected to understand the behaviour of six core logic gates — NOT, AND, OR, NAND, NOR, and XOR — draw their circuit symbols, construct truth tables, write Boolean expressions, and design simple combinational logic circuits. Mastering these concepts is essential not only for the exam but also for understanding how processors and memory work at the hardware level.
逻辑门是计算机内部数字电路的基本构件。它们处理二进制输入（0 或 1），并根据特定的逻辑运算产生一个二进制输出。在 AQA GCSE 计算机科学大纲中，你需要理解六种核心逻辑门——非门、与门、或门、与非门、或非门和异或门的行为，能够绘制它们的电路符号，构建真值表，写出布尔表达式，并设计简单的组合逻辑电路。掌握这些概念不仅对考试至关重要，也有助于理解处理器和存储器在硬件层面是如何工作的。
1. The NOT Gate | 非门
The NOT gate is the simplest logic gate, performing a logical negation. It has only one input (labelled A) and one output (labelled Q). The output is always the inverse of the input: if the input is 0, the output is 1; if the input is 1, the output is 0. In Boolean algebra, the NOT operation is written as Q = ¬A or Q = A’. The standard circuit symbol is a triangle with a small circle (bubble) at the output, indicating inversion. NOT gates are often used in digital circuits to change a signal to its opposite state, for instance, to produce the complement of a bit inside the arithmetic logic unit (ALU).
非门是最简单的逻辑门，执行逻辑取反操作。它只有一个输入（标记为 A）和一个输出（标记为 Q）。输出始终是输入的反相：如果输入为 0，则输出为 1；如果输入为 1，则输出为 0。在布尔代数中，非运算写作 Q = ¬A 或 Q = A’。标准电路符号是一个三角形，输出端带有一个小圆圈（气泡），表示取反。非门常用于数字电路中，将信号变为其相反状态，例如在算术逻辑单元（ALU）内部产生某个比特的补码。
2. The AND Gate | 与门
The AND gate implements logical conjunction. It has two inputs (or more, but two-input gates are the focus at GCSE) and produces a high output (1) only when all inputs are high (1). If any input is 0, the output is 0. The Boolean expression is Q = A · B (A AND B). The truth table for a two-input AND gate is:
与门实现逻辑合取。它有两个输入（或者更多，但 GCSE 重点关注两输入门），仅当所有输入都为高电平（1）时才会输出高电平（1）。只要任一输入为 0，输出就为 0。其布尔表达式为 Q = A · B（A 与 B）。两输入与门的真值表如下：
| A | B | Q |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
In everyday terms, the AND gate works like a series circuit: both switches must be closed for the light to come on. In a CPU, AND gates are used for masking operations, where a bit pattern is forced to 0 unless a particular enable signal is high.
从日常角度看，与门就像串联电路：两个开关都必须闭合，灯才会亮。在 CPU 中，与门用于掩码操作，除非特定的使能信号为高电平，否则比特模式会被强制置 0。
3. The OR Gate | 或门
The OR gate performs logical disjunction. A two-input OR gate gives a high output (1) if at least one input is 1. The output is 0 only when both inputs are 0. The Boolean expression is Q = A + B. The symbol is similar to the AND gate but with a curved back and the outputs merging into a single line. The truth table is:
或门执行逻辑析取。两输入或门在至少一个输入为 1 时输出高电平（1）。仅当两个输入均为 0 时，输出才为 0。布尔表达式为 Q = A + B。其符号类似于与门，但背部是弯弧形状，输出合并到一条线上。真值表如下：
| A | B | Q |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
OR logic can be compared to a parallel circuit: if either switch is closed, the light is on. In computer architecture, OR gates merge multiple status signals — for example, a processor might generate an interrupt if any of several error flags goes high.
或逻辑可以比作并联电路：只要任何一个开关闭合，灯就会亮。在计算机体系结构中，或门用于合并多个状态信号——例如，如果多个错误标志中的任何一个变为高电平，处理器就可能产生中断。
4. The NAND Gate | 与非门
The NAND gate is a combination of an AND gate followed by a NOT gate — hence the name ‘NOT AND’. It outputs 0 only when all inputs are 1; in every other case the output is 1. In Boolean terms, Q = ¬(A · B). The NAND gate is particularly important in digital electronics because it is considered a universal gate: any other logic function can be constructed entirely out of NAND gates. At GCSE, you must recognise the symbol (an AND gate symbol with a bubble at the output) and be able to complete its truth table:
与非门是与门后面接一个非门的组合——因此得名“非与”。仅当所有输入均为 1 时，输出为 0；其他所有情况输出均为 1。用布尔表达式表示为 Q = ¬(A · B)。与非门在数字电子学中尤为重要，因为它被视为通用门：任何其他逻辑功能都可以完全由与非门构建。在 GCSE 中，你必须识别其符号（与门符号并在输出端加小圆圈），并能够完成其真值表：
| A | B | Q |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
Exam questions frequently ask students to draw a circuit using only NAND gates to replace an AND-OR combination. Understanding De Morgan’s laws is helpful here: the NAND of two inputs is equivalent to the OR of the complementary inputs.
考试题目经常要求学生只使用与非门来画出一个替代与-或组合的电路。在这里理解德摩根定律会很有帮助：两个输入的与非等价于其互补输入的或。
5. The NOR Gate | 或非门
The NOR gate is the OR function inverted. It gives an output of 1 only when all inputs are 0; if any input is 1, the output is 0. The Boolean expression is Q = ¬(A + B). Like NAND, the NOR gate is also universal — you can build an entire digital system using only NOR gates. Its symbol shows an OR gate with a bubble on the output. The truth table is:
或非门是或功能取反的结果。仅当所有输入都为 0 时，输出才为 1；如果任一输入为 1，输出则为 0。布尔表达式为 Q = ¬(A + B)。和与非门一样，或非门也是通用门——你可以仅用或非门构建整个数字系统。其符号显示为一个或门，输出端带有小圆圈。真值表如下：
| A | B | Q |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
NOR gates are commonly used in SRAM (Static Random Access Memory) cells to store bits. For the GCSE exam, you need to be able to mix NOR gates with other gates and deduce the overall truth table of a given circuit.
或非门常用于静态随机存取存储器（SRAM）单元中以存储比特。在 GCSE 考试中，你需要能够将或非门与其他门混合使用，并根据给定电路推导出总体的真值表。
6. The XOR Gate | 异或门
The XOR (Exclusive OR) gate is different from a standard OR gate: it outputs 1 only when an odd number of inputs are 1 — for a two-input XOR, the inputs must be different. If both inputs are the same (both 0 or both 1), the output is 0. The Boolean expression is Q = A ⊕ B, which can also be written as (A · ¬B) + (¬A · B). The standard symbol adds an extra curved line on the input side. The truth table:
异或门不同于标准或门：仅当奇数个输入为 1 时才输出 1——对于两输入异或门来说，输入必须不同。如果两个输入相同（都为 0 或都为 1），输出为 0。布尔表达式为 Q = A ⊕ B，也可以写成 (A · ¬B) + (¬A · B)。标准符号在输入侧多画了一条弧线。真值表如下：
| A | B | Q |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
XOR gates are vital in arithmetic circuits, particularly in adders. They are used to calculate the sum bit in binary addition. Being able to recognise XOR behaviour from a truth table and convert it into a gate diagram is a key exam skill.
异或门在算术电路中至关重要，特别是在加法器中。它们用于计算二进制加法中的和位。能够根据真值表识别异或行为并将其转换为门级图是一项关键的考试技能。
7. Truth Tables and Boolean Expressions | 真值表与布尔表达式
A truth table systematically lists all possible input combinations for a logic circuit and records the corresponding output. For n inputs, there are 2ⁿ rows. At GCSE, you will often work with two or three inputs, so tables have 4 or 8 rows. You must be able to construct a truth table from a given logic diagram, a Boolean expression, or a written problem statement. Boolean expressions use the operators · (AND), + (OR), ¬ or ′ (NOT), and ⊕ (XOR). Simpler expressions often mean simpler circuits, so you may be asked to simplify an expression using Boolean laws such as identity, null, absorption, and De Morgan’s laws. Always check that your truth table matches the expression.
真值表系统地列出逻辑电路所有可能的输入组合，并记录相应的输出。对于 n 个输入，有 2ⁿ 行。在 GCSE 中，你通常会处理两到三个输入，因此表格有 4 或 8 行。你必须能够根据给定的逻辑图、布尔表达式或书面的问题陈述构建真值表。布尔表达式使用运算符 ·（与）、+（或）、¬ 或 ′（非）以及 ⊕（异或）。更简单的表达式通常意味着更简单的电路，因此你可能会被要求使用恒等律、零律、吸收律和德摩根定律等布尔定律来化简表达式。务必检查你的真值表是否与表达式匹配。
8. Designing Logic Circuits from Truth Tables | 根据真值表设计逻辑电路
One common exam task is to design a logic circuit that satisfies a given truth table or a problem scenario. The sum-of-products method is the standard approach: identify the rows where the output is 1, write the minterm for each (e.g. for inputs 0,1,1 the minterm is ¬A·B·C), and then OR all the minterms together. This gives the canonical Boolean expression. You then draw the corresponding logic circuit using the required gates. Often you will be asked to simplify the circuit further, either by algebraic manipulation or by inspection — for example, spotting that the output is simply A AND B when all other minterms can be eliminated.
一个常见的考试题型是设计一个能够满足给定真值表或问题场景的逻辑电路。与项之和方法是标准做法：找出输出为 1 的那些行，为每一行写出最小项（例如，对于输入 0,1,1，最小项为 ¬A·B·C），然后将所有最小项相或。这样就得到了规范布尔表达式。然后你画出使用所需门电路对应的逻辑图。你经常会被要求进一步简化电路，可以通过代数化简或观察实现——例如，当所有其他最小项都可以消去时，会发现输出实际上只是 A 与 B。
9. The Half Adder and Full Adder | 半加器与全加器
An important application of logic gates at GCSE is binary addition. A half adder adds two single-bit numbers (A and B) and produces a sum bit (S) and a carry bit (C). The sum is given by A XOR B, and the carry is given by A AND B. A full adder extends this to three inputs — A, B, and a carry-in (Cᵢₙ) — producing a sum and a carry-out. The full adder can be constructed using two half adders and an OR gate: S = (A ⊕ B) ⊕ Cᵢₙ, and Cₒᵤₜ = (A · B) + (Cᵢₙ · (A ⊕ B)). You should be able to draw both circuits and complete their truth tables. Understanding these structures shows how logic gates combine to perform arithmetic, the fundamental operation of the ALU.
在 GCSE 中，逻辑门的一个重要应用是二进制加法。半加器将两个单比特数（A 和 B）相加，产生一个和位（S）和一个进位（C）。和由 A XOR B 给出，进位由 A AND B 给出。全加器则将其扩展到三个输入——A、B 和进位输入（Cᵢₙ）——产生和与进位输出。全加器可以用两个半加器和一个或门构建：S = (A ⊕ B) ⊕ Cᵢₙ，而 Cₒᵤₜ = (A · B) + (Cᵢₙ · (A ⊕ B))。你应该能够画出这两种电路并完成它们的真值表。理解这些结构可以展示逻辑门如何组合起来执行算术运算，这是 ALU 的基本操作。
10. Logic Gates in Computing Systems | 逻辑门在计算系统中的应用
Beyond adders, logic gates appear throughout a computer’s architecture. Flip-flops made from NAND or NOR gates form the basis of registers and memory cells. The control unit uses AND and OR gates to decode instructions into control signals. Multiplexers and demultiplexers, built from basic gates, route data around the processor. Even error-checking circuits, such as parity generators, rely on XOR gates. Linking these real-world applications back to the abstract logic you learn in the classroom will deepen your understanding and help you tackle longer-answer exam questions that ask for explanations of how hardware works.
除了加法器之外，逻辑门在计算机体系结构中无处不在。由与非门或或非门构成的触发器构成了寄存器和存储单元的基础。控制单元使用与门和或门将指令译码为控制信号。由基本门构成的多路复用器和多路解复用器在处理器中传送数据。甚至如奇偶校验生成器这样的错误检测电路也依赖于异或门。将这些现实世界的应用与你在课堂上学到的抽象逻辑联系起来，将加深你的理解，并帮助你应对要求解释硬件如何工作的长篇答题。
11. Common Exam Pitfalls and How to Avoid Them | 常见考试误区与应对策略
Many students lose marks by misreading circuit symbols — especially confusing the bubble placement on a NOT, NAND, or NOR gate. Always double-check whether the bubble is on the input or output side. Another frequent mistake is forgetting that an XOR gate outputs 1 only when inputs differ; it is not the same as a regular OR. When building truth tables, write the input combinations in binary counting order (000, 001, 010, …) to ensure completeness. For circuit design questions, clearly label intermediate outputs in your diagram. Examiners also look for correct use of Boolean algebra: remember that A + ¬A = 1 and A · ¬A = 0. Practise simplifying expressions with De Morgan’s laws: ¬(A·B) = ¬A + ¬B, and ¬(A+B) = ¬A · ¬B.
许多学生因误读电路符号而失分——特别是混淆了非门、与非门或或非门上小圆圈的放置位置。务必检查小圆圈是位于输入侧还是输出侧。另一个常见错误是忘记异或门仅在输入不同时才输出 1；它与普通或门不同。在构建真值表时，按照二进制计数顺序（如 000、001、010……）书写输入组合，以确保完整性。对于电路设计题，在图中清晰地标出中间输出。考官还会关注布尔代数的正确使用：记住 A + ¬A = 1 以及 A · ¬A = 0。练习运用德摩根定律化简表达式：¬(A·B) = ¬A + ¬B，以及 ¬(A+B) = ¬A · ¬B。
12. Quick-Fire Revision Checklist | 快速复习清单
- Recognise and draw the six basic logic gate symbols | 识别并绘制六种基本逻辑门符号
- Write truth tables for each gate | 为每种门写出其真值表
- Convert between truth tables, Boolean expressions, and logic diagrams | 在真值表、布尔表达式和逻辑图之间相互转换
- Use the sum-of-products technique to design circuits | 使用与项之和方法设计电路
- Simplify Boolean expressions with basic laws and De Morgan | 运用基本定律和德摩根定律化简布尔表达式
- Explain how a half adder and full adder work | 解释半加器和全加器的工作原理
- Apply logic gate knowledge to real-world computer components | 将逻辑门知识应用于真实的计算机组件
Spend time practising past paper questions under timed conditions, especially those that combine several different gate types into one circuit. Being methodical and double-checking each truth table row will boost your confidence and accuracy.
在计时条件下花时间练习历年真题，尤其是那些将多种不同门类型组合到一个电路中的题目。有条理地逐行检查真值表将提升你的自信心和准确性。
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