📚 GCSE OCR Computer Science: Logic Gates | GCSE OCR 计算机：逻辑门 考点精讲
Logic gates are the fundamental building blocks of digital circuits. They take one or more binary inputs and produce a single binary output based on a specific Boolean function. In the GCSE OCR Computer Science specification, understanding how these gates behave, how to interpret truth tables, and how to combine them to form more complex circuits is essential for both the examination and for grasping how computers process data at the lowest level.
逻辑门是数字电路的基本构建块。它们接收一个或多个二进制输入，并根据特定的布尔函数产生单个二进制输出。在 GCSE OCR 计算机科学大纲中，理解这些门的行为、如何解读真值表以及如何组合它们以形成更复杂的电路，对于考试和把握计算机在最底层如何处理数据都至关重要。
1. What Are Logic Gates? | 什么是逻辑门？
Logic gates are electronic components that operate on binary signals. They are the simplest form of digital circuit, and each gate corresponds to a basic Boolean operator. In GCSE OCR, you will encounter six main gates: AND, OR, NOT, NAND, NOR, and XOR. Every gate has a distinct symbol, a truth table, and a logical expression that describes its function.
逻辑门是对二进制信号进行操作的电子元件。它们是最简单的数字电路形式，每个门对应一个基本的布尔运算符。在 GCSE OCR 中，你会遇到六个主要门：与门、或门、非门、与非门、或非门和异或门。每个门都有独特的符号、真值表以及描述其功能的逻辑表达式。
Inputs and outputs in digital logic are represented by two voltage levels: a high voltage, typically treated as ‘1’ or TRUE, and a low voltage, treated as ‘0’ or FALSE. By connecting gates together, we can build circuits that perform arithmetic, store data, and make decisions. The behaviour of any logic circuit can be completely described by a truth table.
数字逻辑中的输入和输出由两个电压电平表示：高电压通常被视为 ‘1’ 或 TRUE，低电压被视为 ‘0’ 或 FALSE。通过将门连接在一起，我们可以构建执行运算、存储数据和作出决策的电路。任何逻辑电路的行为都可以完全由真值表来描述。
2. The AND Gate | 与门
The AND gate outputs 1 only when all its inputs are 1. If any input is 0, the output is 0. In Boolean algebra, this is represented by the multiplication symbol: Q = A · B or simply Q = A AND B. The AND gate can have more than two inputs, but the principle remains the same — the output is 1 only when every input is 1.
与门仅在所有输入都为 1 时才输出 1。如果任一输入为 0，输出即为 0。在布尔代数中，这用乘号表示：Q = A · B 或简写为 Q = A AND B。与门可以有两个以上的输入，但原理保持不变——只有当每个输入都为 1 时输出才为 1。
| A | B | Q (A AND B) |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
You can think of an AND gate as a security system where all conditions must be met simultaneously. For example, a car’s engine will start only if the ignition is on AND the gear is in park. The symbol for an AND gate is a D-shaped block with two input lines on the left and one output line on the right.
你可以把与门想象成一个所有条件必须同时满足的安全系统。例如，汽车发动机仅在点火开关打开且档位在驻车档时才会启动。与门的符号是一个左侧有两条输入线、右侧有一条输出线的 D 形方块。
3. The OR Gate | 或门
The OR gate outputs 1 if at least one of its inputs is 1. Its output is 0 only when all inputs are 0. The Boolean expression is Q = A + B (the ‘+’ sign here means logical OR, not addition) or Q = A OR B. Like the AND gate, an OR gate can be extended to many inputs.
或门在至少一个输入为 1 时输出 1。仅当所有输入都为 0 时输出才为 0。布尔表达式为 Q = A + B（这里的 ‘+’ 号表示逻辑或，而非算术加法）或 Q = A OR B。和与门一样，或门可以扩展到多个输入。
| A | B | Q (A OR B) |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
An OR gate is like a light controlled by two switches in parallel: the light turns on if either switch is pressed. The symbol is a curved shape reminiscent of a shield, with inputs entering from the left and the output leaving on the right.
或门就像由两个并联开关控制的灯：只要按下任一开关，灯就会亮。其符号是一个类似盾牌的弧形形状，输入从左侧进入，输出从右侧离开。
4. The NOT Gate | 非门
The NOT gate, also called an inverter, has only one input. It outputs the opposite logical value of its input: if the input is 1, the output is 0; if the input is 0, the output is 1. The Boolean expression is Q = ¬A, or sometimes written with an overbar as Q = Ā.
非门，也称为反相器，只有一个输入。它输出与输入相反的逻辑值：如果输入为 1，输出为 0；如果输入为 0，输出为 1。布尔表达式是 Q = ¬A，有时也写作上方带横线的 Q = Ā。
| A | Q (NOT A) |
|---|---|
| 0 | 1 |
| 1 | 0 |
The NOT gate is visually represented by a triangle with a small bubble (inversion circle) at its output. This bubble indicates the inversion of the signal. When you see a bubble on any gate input or output, it signifies that the signal is inverted at that point.
非门的视觉表示是一个三角形，输出端带有一个小圆圈（反相圈）。这个圆圈表示信号的反相。当你在任何门的输入或输出端看到一个小圆圈时，它表示该点的信号被取反。
5. The NAND Gate | 与非门
The NAND gate is a combination of an AND gate followed by a NOT gate. Its output is the exact opposite of an AND gate: it outputs 0 only when all inputs are 1; otherwise it outputs 1. The Boolean expression is Q = ¬(A · B). NAND gates are particularly important because any other logic function can be built using only NAND gates — they are functionally complete.
与非门是与门后接非门的组合。它的输出正好是与门的相反情况：仅当所有输入都为 1 时才输出 0；否则输出 1。布尔表达式为 Q = ¬(A · B)。与非门特别重要，因为仅使用与非门就可以构建出任何其他逻辑函数——它们具有功能完备性。
| A | B | Q (A NAND B) |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
The symbol for a NAND gate looks exactly like an AND gate but with a small inversion bubble at the output. When you design circuits, replacing an AND followed by a NOT with a single NAND gate saves components and space.
与非门的符号看起来与与门完全一样，但输出端带有一个小的反相圈。在设计电路时，用一个与非门来代替与门后接非门，可以节省元件和空间。
6. The NOR Gate | 或非门
The NOR gate is the OR gate followed by a NOT. It outputs 1 only when all inputs are 0; if any input is 1, the output becomes 0. Its Boolean expression is Q = ¬(A + B). Like the NAND gate, NOR gates are also functionally complete, meaning you can build any digital circuit using only NOR gates.
或非门是或门后接非门。它仅在所有输入都为 0 时才输出 1；如果任一输入为 1，输出就变为 0。其布尔表达式为 Q = ¬(A + B)。与与非门一样，或非门也具有功能完备性，这意味着你可以仅使用或非门构建任何数字电路。
| A | B | Q (A NOR B) |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
Remember that the NOR gate symbol is the OR gate symbol with an inversion bubble at the output. In OCR exams, you might be asked to draw the symbol or complete a truth table, so practise recognising the bubble as an automatic inversion of the normal OR output.
请记住，或非门的符号是或门符号输出端加上反相圈。在 OCR 考试中，你可能会被要求绘制符号或补全真值表，因此要练习识别该圆圈是对正常或门输出的自动取反。
7. The XOR Gate | 异或门
The XOR (Exclusive OR) gate outputs 1 only when an odd number of inputs are 1. For two inputs, it outputs 1 if the inputs are different, and 0 if they are the same. The Boolean expression is Q = A ⊕ B. In the two-input case, this can also be written as Q = A · ¬B + ¬A · B.
异或门仅在输入中 1 的个数为奇数时输出 1。对于两个输入，如果输入不同则输出 1，如果输入相同则输出 0。布尔表达式为 Q = A ⊕ B。在两输入情况下，它也可以写成 Q = A · ¬B + ¬A · B。
| A | B | Q (A XOR B) |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
The XOR gate symbol is similar to the OR gate but has an additional curved line on the input side. XOR gates are essential in arithmetic circuits, such as adders, and in parity checking. In the GCSE specification, you are expected to know its truth table and recognise its application in simple addition.
异或门的符号与或门相似，但在输入侧多了一条曲线。异或门在算术电路（如加法器）和奇偶校验中至关重要。在 GCSE 规范中，要求你了解它的真值表，并认识它在简单加法中的应用。
8. Using Truth Tables | 使用真值表
A truth table lists every possible combination of input values and the corresponding output for a logic gate or circuit. For a circuit with n inputs, there are 2ⁿ rows in the truth table. Truth tables are the primary method in GCSE OCR to analyse and communicate the behaviour of logic circuits.
真值表列出了逻辑门或电路每种可能的输入值组合及其对应的输出。对于一个有 n 个输入的电路，真值表有 2ⁿ 行。在 GCSE OCR 中，真值表是分析和传达逻辑电路行为的主要方法。
When you are given a combination of gates, you should be prepared to write the Boolean expression, then substitute all input combinations to construct the truth table. Start with the inputs in binary counting order (000, 001, 010, and so on) to ensure no combination is missed. Always verify your intermediate columns before writing the final output.
当你遇到门电路的组合时，应当准备好写出布尔表达式，然后代入所有输入组合来构建真值表。从二进制计数顺序（000, 001, 010 等等）开始，确保没有遗漏任何组合。在填写最终输出之前，务必先验证中间列。
9. Combining Gates into Circuits | 组合门构成电路
Real digital systems are built by connecting several logic gates together. A simple example is creating an AND-OR circuit: Q = (A AND B) OR C. The output of the AND gate becomes one input to the OR gate. When analysing such circuits, label the output of each gate with a temporary variable, then determine the final output step by step.
真实的数字系统是通过将多个逻辑门连接在一起构建的。一个简单的例子是构建一个与或电路：Q = (A AND B) OR C。与门的输出成为或门的一个输入。在分析这类电路时，用一个临时变量标记每个门的输出，然后逐步确定最终输出。
Another common pattern is the use of the XOR gate combined with AND to construct a half adder. A half adder adds two single binary digits and produces a sum bit (S) and a carry bit (C). S = A XOR B, C = A AND B. This is a critical building block that appears in the OCR specification.
另一个常见模式是使用异或门和与门来构建半加器。半加器将两个单独的二进制数字相加，产生一个和位 (S) 和一个进位位 (C)。S = A XOR B，C = A AND B。这是在 OCR 规范中出现的关键构建块。
| A | B | Sum (S) | Carry (C) |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
Full adders can then be built by combining two half adders and an OR gate, allowing multi-bit binary addition. Though the full adder is beyond the core GCSE content, knowing the half adder and the logic behind it is often examined.
然后可以通过组合两个半加器和一个或门来构建全加器，允许进行多位二进制加法。虽然全加器超出了 GCSE 的核心内容，但了解半加器及其背后的逻辑经常会出现在考试中。
10. Boolean Algebra Simplification | 布尔代数化简
Boolean algebra provides a set of rules for simplifying logic expressions. A simpler expression usually means fewer gates, which reduces cost and power consumption. Key laws include the identity law (A + 0 = A, A · 1 = A), the annulment law (A + 1 = 1, A · 0 = 0), the idempotent law (A + A = A, A · A = A), and the complement law (A + ¬A = 1, A · ¬A = 0).
布尔代数提供了一组简化逻辑表达式的规则。更简单的表达式通常意味着更少的门，从而降低成本和功耗。关键定律包括恒等律 (A + 0 = A, A · 1 = A)、零一律 (A + 1 = 1, A · 0 = 0)、幂等律 (A + A = A, A · A = A) 和互补律 (A + ¬A = 1, A · ¬A = 0)。
The distributive law is also useful: A · (B + C) = A · B + A · C. You can use these laws to prove that two circuits are equivalent, which is a common OCR question type. For example, to simplify A · (A + B), apply the law of absorption: A · (A + B) = A.
分配律也很有用：A · (B + C) = A · B + A · C。你可以用这些定律来证明两个电路是等价的，这是 OCR 考试中常见的题型。例如，要化简 A · (A + B)，应用吸收律：A · (A + B) = A。
When simplifying, always write each step and state the law used. Practise with expressions involving two or three variables until you can confidently reduce them to their simplest form.
化简时，务必写出每一步并注明所用定律。练习包含两个或三个变量的表达式，直到你能自信地将它们化为最简形式。
11. De Morgan’s Laws | 德摩根定律
De Morgan’s Laws describe how to transform an expression involving AND and OR under negation. The two laws are: ¬(A · B) = ¬A + ¬B, and ¬(A + B) = ¬A · ¬B. In simple English, the negation of an AND is the OR of the negations, and the negation of an OR is the AND of the negations.
德摩根定律描述了如何转换带有与和或的取反表达式。两条定律是：¬(A · B) = ¬A + ¬B，以及 ¬(A + B) = ¬A · ¬B。简单来说，与的取反等于取反的或，或的取反等于取反的与。
These laws are incredibly useful for moving negation bubbles across gates and for transforming NAND-only or NOR-only circuits. In exams, you may be asked to apply De Morgan’s Laws to simplify a circuit or to prove that a NAND gate with inverted inputs is equivalent to an OR gate.
这些定律对于在门之间移动反相圈以及转换纯与非门或纯或非门电路非常有用。在考试中，你可能会被要求应用德摩根定律来简化电路，或证明输入取反的与非门等价于或门。
To internalise De Morgan’s Laws, break the line and change the sign: when the negation bar is broken, the AND becomes OR (or vice versa), and individual terms are negated. This visual trick helps in quickly sketching equivalent circuits.
为了内化德摩根定律，记住“断横线，变符号”：当取反横线被断开时，与变成或（反之亦然），并且各个项单独取反。这种视觉技巧有助于快速草绘等效电路。
12. Exam Tips and Common Mistakes | 考试技巧与常见错误
In the OCR GCSE exam, logic gate questions often require you to complete a truth table, draw a circuit from an expression, or write the Boolean expression for a given logic diagram. A common mistake is misreading the gate type — check the shape and whether there is an inversion bubble before you begin.
在 OCR GCSE 考试中，逻辑门题目通常要求你补全真值表、根据表达式绘制电路，或根据给定的逻辑图写出布尔表达式。一个常见的错误是误读门类型——在开始之前，检查形状以及是否有反相圈。
Another pitfall is forgetting that NAND and NOR gates invert the output. When tracing signals through a circuit, mark the output of each gate and double-check whether a bubble changes the logic level. Work systematically left to right, and use intermediate columns in your truth table.
另一个易错点是忘记与非门和或非门会反转输出。在跟踪电路信号时，标记每个门的输出，并再次检查圆圈是否改变了逻辑电平。从左到右有条理地工作，并在真值表中使用中间列。
If you are asked to simplify a Boolean expression, remember to show your working. Even if your final answer is incorrect, you can still earn marks for applying the correct law or for accurate intermediate steps. Practise with past paper questions to become comfortable with the style and pace required.
如果题目要求你化简布尔表达式，记得展示解题过程。即使最终答案不正确，你仍可以因应用了正确的定律或准确的中间步骤而获得分数。通过练习历年真题来适应所需的题型和节奏。
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