📚 IB & CCEA Computer Science: Formula Handbook | IB 和 CCEA 计算机：公式汇总手册
This handbook collects the most important formulas, laws, and calculation methods required for IB and CCEA Computer Science examinations. It is designed for quick reference and last‑minute revision, covering topics from number systems to assembly language.
本手册汇总了 IB 和 CCEA 计算机科学考试中必考的核心公式、定律与计算方法，适合考前速查与系统复习，涵盖从数制到汇编语言的关键内容。
1. Number Systems Conversion | 数制转换
Any base‑B positional number can be converted to decimal using the weighted sum of its digits multiplied by the base raised to the power of the position. For a number with digits dm‑1…d1d0, the decimal value is calculated as follows:
任意基数为 B 的按位记数系统均可通过各位数字乘以其位权的加权和转换为十进制。对于一个数字 dm‑1…d1d0，其十进制值按以下公式计算：
Decimal Value = Σ di × Bi (i = 0 to m−1)
To convert decimal to binary, repeatedly divide the decimal number by 2 and record the remainders (0 or 1) from bottom to top. For hexadecimal, each hex digit corresponds to a 4‑bit binary group.
将十进制整数转换为二进制时，不断除以 2 并记录余数（0 或 1），从下往上读取。十六进制与二进制之间的转换可直接以四位分组完成。
| Hexadecimal | Binary |
|---|---|
| A (10) | 1010 |
| F (15) | 1111 |
2. Binary Arithmetic & Two’s Complement | 二进制算术与补码
Binary addition follows similar rules to decimal, carrying 1 when the sum exceeds 1. Overflow occurs when the result exceeds the representable range for a given number of bits. Two’s complement is the standard method for representing signed integers.
二进制加法遵循“逢二进一”的规则，当结果超出给定位数的表示范围时会发生溢出。补码是表示有符号整数的标准方法。
−X = (¬X) + 1 (invert all bits and add 1)
For an n‑bit two’s complement number, the range of representable values is:
对于 n 位补码，其可表示的数值范围为：
−2n−1 to 2n−1 − 1
To obtain the magnitude of a negative two’s complement number, apply the same two’s complement operation again. This property simplifies subtraction to the addition of the two’s complement of the subtrahend.
要获得一个负补码的绝对值，可再次对其执行“取反加一”操作。利用这一特性，减法可转化为加上减数的补码，从而简化硬件设计。
3. Floating Point Representation | 浮点数表示
IEEE 754 single‑precision floating‑point format uses 32 bits: 1 sign bit, 8 exponent bits (biased by 127), and 23 fraction bits. The value is interpreted as:
IEEE 754 单精度浮点格式使用 32 位：1 位符号、8 位阶码（偏移量 127）和 23 位尾数。其值为：
Value = (−1)S × (1.M) × 2(E − 127)
The mantissa uses a hidden bit: the leading 1 is implicit in normalised numbers. For double precision, the exponent is 11 bits biased by 1023. Special patterns represent zero, NaN, and infinity.
尾数采用隐藏位：规约数的整数部分总是 1，因此不需要显式存储。双精度格式的阶码为 11 位，偏移量 1023。特殊编码用于表示零、非数（NaN）和无穷大。
4. Boolean Algebra Laws | 布尔代数定律
Boolean algebra provides a mathematical framework for designing and simplifying digital logic circuits. The fundamental laws include commutativity, associativity, distributivity, absorption, and De Morgan’s theorems.
布尔代数为数字逻辑电路的设计与化简提供了数学基础。基本定律包括交换律、结合律、分配律、吸收律以及德摩根定理。
(A + B)’ = A’ · B’ and (A · B)’ = A’ + B’
Here + denotes OR, · denotes AND, and the prime (‘) represents NOT. Other useful identities: A + 0 = A, A · 1 = A, A + A’ = 1, A · A’ = 0, and A + A·B = A.
式中 + 表示逻辑或，· 表示逻辑与，单引号 (‘) 表示逻辑非。其他常用恒等式包括：A + 0 = A，A · 1 = A，A + A’ = 1，A · A’ = 0，以及吸收律 A + A·B = A。
5. Karnaugh Maps & Simplification | 卡诺图与化简
Karnaugh maps (K‑maps) offer a visual method for minimising Boolean expressions. Adjacent cells differ by only one variable, and groups of 1, 2, 4, 8, etc. can be combined to form simpler product terms.
卡诺图提供了一种可视化的布尔表达式化简方法。相邻格仅有一个变量不同，可以圈出 1、2、4、8 等个“1”来合并成更简单的乘积项。
The simplified expression is obtained as the sum of the prime implicants that cover all the 1’s in the map. Don’t‑care conditions (X) may be used to further reduce the logic.
化简后的表达式为覆盖卡诺图中所有“1”的本原蕴含项之和。无关项 (X) 可以根据需要当作 0 或 1，从而进一步减少逻辑门的数量。
F = Σ(minterms) after grouping
6. Logic Gates & Truth Tables | 逻辑门与真值表
Logic gates are the building blocks of digital circuits. Each gate implements a specific Boolean function, and its behaviour is fully described by a truth table. The basic gates are AND, OR, NOT, NAND, NOR, XOR, and XNOR.
逻辑门是数字电路的基本构件。每个逻辑门实现一个特定的布尔函数，其行为可由真值表完整描述。基本门包括与、或、非、与非、或非、异或和同或。
The XOR (exclusive OR) function is particularly common and can be expressed as:
异或门 (XOR) 在计算机科学中十分常见，其表达式为：
A ⊕ B = A · B’ + A’ · B
Universal gates (NAND and NOR) can be used to construct any other logic function, which is essential in circuit minimisation and standardised chip design.
通用门（与非和或非）可以构建任意逻辑函数，这在电路化简和标准化芯片设计中非常重要。所有基本门都可以仅用 NAND 门或仅用 NOR 门来实现。
7. Algorithm Complexity | 算法复杂度
Algorithm efficiency is measured using Big‑O notation, which describes the upper bound of the time or space required as the input size n grows. Common complexities in ascending order:
算法效率用大 O 表示法衡量，它描述了随着输入规模 n 增长，时间或空间需求的上界。常见复杂度从小到大排列：
O(1) ＜ O(log n) ＜ O(n) ＜ O(n log n) ＜ O(n²) ＜ O(2ⁿ)
Binary search follows the recurrence T(n) = T(n/2) + O(1), leading to O(log n) time. Sequential search has O(n), and simple sorting algorithms like bubble sort exhibit O(n²).
二分查找的递推关系为 T(n) = T(n/2) + O(1)，时间复杂度为 O(log n)。顺序查找为 O(n)，而简单排序算法（如冒泡排序）的时间复杂度为 O(n²)。
Summations often appear in the analysis of nested loops, e.g. Σ i = n(n+1)/2, which gives a quadratic leading term when the loop variables depend on each other.
求和公式常用于嵌套循环分析，例如 Σ i = n(n
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