A-Level OCR Computer Science: High-Frequency Exam Topics Summary | A-Level OCR 计算机科学：高频考点总结

📚 A-Level OCR Computer Science: High-Frequency Exam Topics Summary | A-Level OCR 计算机科学：高频考点总结

Preparing for the OCR A-Level Computer Science exam means revisiting the most frequently assessed concepts. This article brings together the essential topics from both components—CPU architecture, data representation, networks, algorithms, and ethical implications—so you can focus your revision on what really matters.

备考 OCR A-Level 计算机科学考试需要重温最常考的知识点。本文汇集了两份试卷中的核心内容——CPU 架构、数据表示、网络、算法以及伦理影响——帮助你锁定复习重点。

1. CPU Architecture and Performance | CPU 架构与性能

The Von Neumann architecture organises a computer around a central processing unit that shares a single memory store for instructions and data. Its key components are the control unit, ALU, registers, and system buses (address, data, control).

冯·诺依曼架构将计算机围绕一个中央处理器组织起来，该处理器在指令和数据之间共享单一存储空间。其关键组成部分包括控制器、ALU、寄存器以及系统总线（地址、数据、控制总线）。

Essential registers include the Program Counter (PC) holding the next instruction address, Memory Address Register (MAR) and Memory Data Register (MDR) for memory access, Current Instruction Register (CIR) for the fetched instruction, and the Accumulator (ACC) for intermediate ALU results.

关键寄存器包括存放下一指令地址的程序计数器 (PC)、用于内存访问的内存地址寄存器 (MAR) 和内存数据寄存器 (MDR)、存放已取指令的当前指令寄存器 (CIR) 以及存放 ALU 中间结果的累加器 (ACC)。

The fetch-decode-execute (FDE) cycle is the heartbeat of the CPU. Fetch: PC → MAR → memory → MDR → CIR. Decode: the control unit interprets the opcode. Execute: the ALU performs arithmetic or logic operations, often storing the result in the ACC.

取指-译码-执行 (FDE) 周期是 CPU 的运作核心。取指：PC → MAR → 内存 → MDR → CIR。译码：控制器解读操作码。执行：ALU 执行算术或逻辑运算，结果通常存入 ACC。

Performance is influenced by clock speed (GHz), number of cores (parallel execution), and cache memory (level 1, 2, 3). Pipelining further boosts throughput by overlapping instruction stages, though it can introduce hazards such as data dependencies.

性能受时钟速度 (GHz)、核心数（并行执行）和高速缓存（L1、L2、L3）的影响。流水线通过重叠指令阶段进一步提高吞吐量，但可能引入数据相关等冒险。

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2. Memory and Storage Management | 内存与存储管理

RAM (Random Access Memory) is volatile and holds the operating system, applications, and data currently in use. ROM (Read-Only Memory) is non-volatile and stores firmware like the bootstrap loader.

RAM（随机存取存储器）是易失性的，容纳着操作系统、应用程序及当前数据。ROM（只读存储器）是非易失性的，存储固件如引导加载程序。

Virtual memory extends available RAM by using a portion of secondary storage. The OS moves pages between RAM and disk; excessive swapping causes disk thrashing, severely degrading performance.

虚拟内存通过使用部分辅助存储来扩展可用 RAM。操作系统在 RAM 和磁盘之间移动页面；过多的交换会导致磁盘抖动，严重降低性能。

Memory can be managed through paging (fixed-size blocks) or segmentation (variable-size logical blocks). Both techniques enable multiprogramming and protection.

内存管理可采用分页（固定大小块）或分段（可变大小逻辑块）技术。两种方法都支持多道程序设计和内存保护。

Secondary storage devices include magnetic hard disks (high capacity, mechanical), solid-state drives (fast, shock-resistant), and optical discs (CD, DVD). The choice involves trade-offs between cost, speed, and durability.

辅助存储设备包括磁性硬盘（大容量，机械式）、固态硬盘（快速，抗震）和光盘（CD、DVD）。选择时需权衡成本、速度和耐用性。

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3. Operating Systems and Software | 操作系统与软件

The operating system (OS) acts as an intermediary, managing hardware resources, providing a user interface, and offering services such as file management, memory management, and I/O supervision.

操作系统作为中介，管理硬件资源，提供用户界面，并提供文件管理、内存管理、输入输出监控等服务。

Interrupts are signals from hardware or software that cause the CPU to suspend its current task, save its state, and execute an Interrupt Service Routine (ISR). The CPU polls for interrupts at the end of each FDE cycle.

中断是由硬件或软件发起的信号，使 CPU 暂停当前任务、保存状态并执行中断服务程序 (ISR)。CPU 在每个 FDE 周期结束时检测中断。

Processor scheduling algorithms include Round Robin (fixed time slices), Shortest Job First, and priority-based scheduling. Each balances fairness, throughput, and response time differently.

处理器调度算法包括轮转（固定时间片）、最短作业优先和基于优先级的调度。它们以不同方式兼顾公平性、吞吐量和响应时间。

Utilities such as defragmentation, encryption, and firewalls maintain system health. Application software (word processors, spreadsheets, IDEs) fulfills user tasks, while system software underpins the platform.

磁盘碎片整理、加密和防火墙等实用程序维护系统健康。应用软件（文字处理、电子表格、IDE）完成用户任务，而系统软件则支撑平台。

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4. Data Representation and Binary Arithmetic | 数据表示与二进制算术

All data inside a computer is stored as binary digits. Hexadecimal (base-16) compresses lengthy binary strings, using digits 0-9 and letters A-F, and is widely used for memory addresses and color codes.

计算机内部所有数据都以二进制数字存储。十六进制（基16）压缩冗长二进制串，使用数字0-9和字母A-F，广泛用于内存地址和颜色代码。

Negative integers can be represented using sign-magnitude (MSB as sign) or two’s complement. Two’s complement simplifies subtraction by making addition work for both positive and negative numbers; to negate, invert all bits and add 1.

负整数可用原码（最高位为符号）或补码表示。补码通过使加法对正负数均有效来简化减法运算；求一个数的负数时，将所有位取反再加 1。

Binary addition follows rules: 0+0=0, 1+0=1, 1+1=0 carry 1. Overflow occurs when a result exceeds the allocated bit width. Binary subtraction is performed by adding the two’s complement.

二进制加法规则：0+0=0，1+0=1，1+1=0 进位1。当结果超出分配的位宽时发生溢出。二进制减法通过加上补码来实现。

A floating-point number is expressed as mantissa × 2ᵉˣᵖ⁾. Normalisation ensures the mantissa’s most significant bit after the binary point is 1, maximising precision. OCR often uses a fixed split of bits between mantissa and exponent.

浮点数表示为 尾数 × 2ᵉˣᵖ⁾。规格化确保尾数的小数点后最高位为 1，以最大化精度。OCR 通常指定尾数和指数之间的固定位划分。

Character encoding schemes range from ASCII (7/8-bit) to Unicode (UTF-8, UTF-16) that cover global scripts. OCR questions may involve code tables and bite counts for text storage.

字符编码方案从 ASCII（7/8 位）到支持全球文字的 Unicode（UTF-8、UTF-16）。OCR 试题常涉及代码表及文本存储的字节数计算。

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5. Networks and Protocols | 网络与协议

A LAN spans a small area, often using Ethernet and switches; a WAN covers large distances, relying on routing and leased lines. Network topologies (star, mesh, bus) affect fault tolerance and cost.

局域网覆盖小范围，通常使用以太网和交换机；广域网跨越长距离，依赖路由和专线。网络拓扑（星型、网状、总线）影响容错能力和成本。

The TCP/IP model is the backbone of the Internet: Application (HTTP, FTP, SMTP), Transport (TCP ensures reliable delivery, UDP is faster), Internet (IP handles addressing and routing), and Link (Ethernet/Wi-Fi). Encapsulation adds headers at each layer.

TCP/IP 模型是互联网的骨干：应用层 (HTTP、FTP、SMTP)，传输层（TCP 保证可靠传输，UDP 速度更快），互联网层（IP 负责寻址和路由），链路层（以太网/Wi-Fi）。封装在各层添加报头。

Packet switching breaks messages into packets that may travel different paths, reassembling at the destination. Circuit switching, used in traditional telephone networks, establishes a dedicated end-to-end path before data transfer.

分组交换将消息拆分为可能沿不同路径传输的数据包，在目的地重新组装。电路交换用于传统电话网络，在传输数据前建立专用的端到端路径。

Security layers use firewalls to filter traffic, symmetric/asymmetric encryption for confidentiality, and digital certificates with a public key infrastructure (PKI) for authenticity. Regular checks for malware and updates are vital.

安全层面采用防火墙过滤流量，对称/非对称加密确保机密性，以及数字证书和公钥基础设施 (PKI) 验证身份。定期检查恶意软件和更新至关重要。

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6. Boolean Algebra and Logic Circuits | 布尔代数与逻辑电路

Logic gates perform Boolean operations: AND (A·B), OR (A+B), NOT (A’ or ¬A), NAND, NOR, XOR (A⊕B). Combinations create combinational logic circuits whose output depends only on current inputs.

逻辑门执行布尔运算：与 (A·B)，或 (A+B)，非 (A’ 或 ¬A)，与非，或非，异或 (A⊕B)。组合形成组合逻辑电路，其输出仅取决于当前输入。

Truth tables systematically list all input combinations and their outputs. Simplification uses algebraic laws such as identity, complement, and De Morgan’s theorems: (A+B)’ = A’·B’ and (A·B)’ = A’+B’.

真值表系统列出所有输入组合及其输出。化简使用恒等律、互补律和德摩根定理等代数定律：(A+B)’ = A’·B’ 以及 (A·B)’ = A’+B’。

Karnaugh maps (K-maps) provide a graphical method for minimising Boolean expressions up to 4 or 5 variables, grouping adjacent 1s to derive simplified sum-of-products forms.

卡诺图 (K-maps) 提供了一种图形化方法，可对最多 4 或 5

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