📚 IGCSE CCEA Computer Science: Logic Gates | IGCSE CCEA 计算机：逻辑门考点精讲
Logic gates are the fundamental building blocks of all digital circuits. In the IGCSE CCEA Computer Science specification, you are expected to understand the operation, symbols, truth tables, and Boolean expressions for the most common logic gates. You must also be able to combine them into simple circuits, analyse a given circuit, and design a circuit from a truth table or description. This article covers every key point you need to master for the exam.
逻辑门是所有数字电路的基本构建模块。在 IGCSE CCEA 计算机科学大纲中，你需要理解最常见逻辑门的功能、符号、真值表和布尔表达式。你还必须能够将它们组合成简单电路，分析给定电路，并根据真值表或描述设计电路。本文涵盖了考试中需要掌握的每一个关键知识点。
1. Introduction to Logic Gates | 逻辑门简介
A logic gate is a small electronic component that performs a Boolean function on one or more binary inputs to produce a single binary output. The input and output values are always either 0 (false, low voltage) or 1 (true, high voltage). These gates are the foundation of processors, memory, and virtually all digital electronics.
逻辑门是一种小型电子元件，它对一个或多个二进制输入执行布尔函数，产生单一的二进制输出。输入和输出值始终是 0（假，低电压）或 1（真，高电压）。这些门是处理器、内存以及几乎所有数字电子产品的基础。
The seven basic types of logic gate are AND, OR, NOT, NAND, NOR, XOR, and XNOR. For IGCSE CCEA, you will focus mainly on the first six: AND, OR, NOT, NAND, NOR, and XOR. Each gate has a unique circuit symbol (often using ANSI or IEC conventions; CCEA typically uses the traditional distinct‑shape symbols) and can be represented by a Boolean expression and a truth table.
七种基本逻辑门类型是 AND、OR、NOT、NAND、NOR、XOR 和 XNOR。对于 IGCSE CCEA，你主要关注前六种：AND、OR、NOT、NAND、NOR 和 XOR。每个门都有独特的电路符号（通常采用 ANSI 或 IEC 惯例；CCEA 一般使用传统的异形符号），并可以用布尔表达式和真值表表示。
When we connect gates together, we form logic circuits that can perform decision‑making, arithmetic, and control tasks. Understanding how to read and build these circuits is a central skill tested in the examination.
当我们把门连接在一起时，就形成了能够执行决策、运算和控制任务的逻辑电路。理解如何阅读和构建这些电路是考试中测试的核心技能。
2. The AND Gate | 与门
The AND gate outputs 1 only if all of its inputs are 1. For a gate with two inputs A and B, the output Q is 1 when A = 1 AND B = 1. In any other case, the output remains 0. This behaviour models the logical conjunction.
与门只有当所有输入都为 1 时才输出 1。对于有两个输入 A 和 B 的门，当 A = 1 且 B = 1 时输出 Q 为 1。在任何其他情况下，输出保持为 0。这种行为模拟了逻辑合取。
Q = A · B
与门布尔表达式：Q 等于 A 与 B。通常用点号或直接并置表示。
Below is the truth table for a two‑input AND gate. Make sure you can reproduce this quickly and without error.
下面是双输入与门的真值表。请确保你能够快速无误地写出它。
| A | B | Q (A AND B) |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
AND gates can have more than two inputs; the principle remains the same: output is 1 only when every input is 1. In circuit diagrams, always draw the standard symbol (a D‑shape with two inputs on the left and one output on the right).
与门可以有多于两个输入；原理相同：只有当每个输入都为 1 时输出才为 1。在电路图中，务必画出标准符号（左侧两个输入端、右侧一个输出端的 D 形符号）。
3. The OR Gate | 或门
An OR gate produces an output of 1 if at least one input is 1. With two inputs A and B, Q = 1 when A = 1 OR B = 1 (or both). The only time the output is 0 is when both inputs are 0. This matches inclusive disjunction in logic.
或门只要至少有一个输入为 1 就输出 1。对于两个输入 A 和 B，当 A = 1 或 B = 1（或两者均为 1）时 Q = 1。输出为 0 的唯一情况是两个输入都为 0。这符合逻辑中的相容析取。
Q = A + B
或门布尔表达式：Q 等于 A 加 B。注意这里的加号表示逻辑或，而非算术加法。
| A | B | Q (A OR B) |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
In many exam questions, the OR gate is used together with an AND gate to create specific decision logic. Remember that the symbol for an OR gate is a curved shape with two inputs arriving at the concave side and the output leaving from the pointed side.
在许多考题中，或门与与门一同使用以创建特定的决策逻辑。记住或门的符号是一个弧形形状，两个输入从凹面进入，输出从尖端离开。
4. The NOT Gate | 非门
The NOT gate, also called an inverter, has only one input. It outputs the logical opposite of the input: if the input is 1, the output is 0, and vice versa. This gate implements Boolean complementation.
非门，也称为反相器，只有一个输入。它输出输入的逻辑相反值：如果输入为 1，则输出为 0，反之亦然。该门实现了布尔补运算。
Q = ¬A or Q = Ā
非门表达式常用 ¬A 或 A 上划线表示。在文本中我们也常写作 A’。
| A | Q (NOT A) |
|---|---|
| 0 | 1 |
| 1 | 0 |
The circuit symbol is a triangle with a small circle (bubble) at the output. The bubble indicates inversion. In diagrams, you will often see the NOT gate combined with other gates to form NAND or NOR.
电路符号是一个三角形，输出端有一个小圆圈（气泡）。气泡表示反相。在电路图中，你经常会看到非门与其他门组合形成与非门或或非门。
5. The NAND Gate | 与非门
A NAND gate is an AND gate followed immediately by a NOT gate. It outputs 1 in every case except when all inputs are 1. In other words, the output is the inverse of the AND gate output. NAND is particularly important because it is a universal gate: you can build any other gate type using only NAND gates.
与非门是与门之后紧跟一个非门。除所有输入均为 1 的情况外，它在所有其他情况下输出 1。换句话说，输出是与门输出的反相。与非门特别重要，因为它是一种通用门：你可以仅使用与非门构建任何其他门类型。
Q = ¬(A · B)
| A | B | Q (A NAND B) |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
The NAND symbol looks like an AND gate with a small inversion bubble on the output. In Boolean expression form, you will see it written with an overline covering both inputs, e.g. AB with a line above. Understanding the NAND truth table is crucial for universal gate problems.
与非门符号看起来像与门，但输出端有一个小的反相气泡。在布尔表达式形式中，你会看到它写作两个输入上方有上划线，例如 AB 加一条上划线。理解与非门真值表对于通用门问题至关重要。
6. The NOR Gate | 或非门
A NOR gate is an OR gate followed by a NOT. It outputs 1 only when all inputs are 0; if any input is 1, the output becomes 0. Like NAND, NOR is also a universal gate, meaning any digital circuit can be constructed using only NOR gates.
或非门是一个或门后面跟一个非门。只有当所有输入都为 0 时它才输出 1；如果有任何一个输入为 1，输出就变为 0。与与非门一样，或非门也是一种通用门，意味着任何数字电路都可以仅用或非门构建。
Q = ¬(A + B)
| A | B | Q (A NOR B) |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
The NOR symbol is an OR gate with a bubble. You will often find it in control circuits where an action should happen only when no sensors are triggered. It is also the key to building NOT, AND, and OR using only NOR gates in coursework problems.
或非门符号是一个带气泡的或门。你经常会发现它用于控制电路，其中只有在没有传感器被触发时才执行某个操作。它也是在课程作业问题中仅用或非门构建 NOT、AND 和 OR 的关键。
7. The XOR Gate | 异或门
The exclusive OR (XOR) gate outputs 1 only when the inputs are different. For two inputs, Q = 1 if A = 0 and B = 1, or if A = 1 and B = 0. When both inputs are the same (both 0 or both 1), the output is 0. XOR is widely used in arithmetic circuits, parity checkers, and data encryption.
异或门（XOR）仅当输入不同时输出 1。对于两个输入，如果 A = 0 且 B = 1，或者 A = 1 且 B = 0，则 Q = 1。当两个输入相同时（均为 0 或均为 1），输出为 0。XOR 广泛用于算术电路、奇偶校验器和数据加密。
Q = A ⊕ B
| A | B | Q (A XOR B) |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
The XOR symbol looks like an OR gate with an extra curved line on the input side. This symbol reminds you that it is an exclusive version of OR. When you see XOR, remember: output is true only when there is an odd number of 1s in the inputs (for multiple‑input XOR).
XOR 符号看起来像或门，但在输入侧多了一条弧线。这个符号提醒你它是或门的互斥版本。当你看到 XOR 时，记住：仅当输入中 1 的个数为奇数时输出才为真（对于多输入 XOR）。
8. Truth Tables and Boolean Expressions | 真值表和布尔表达式
A truth table lists all possible input combinations and the corresponding output for a logic gate or circuit. For a circuit with n inputs, the truth table will have 2&supn; rows. You must be able to construct a truth table for any given logic diagram by working through each combination step by step.
真值表列出了所有可能的输入组合以及逻辑门或电路的相应输出。对于一个有 n 个输入的电路，真值表将有 2&supn; 行。你必须能够通过逐步处理每种组合，为任何给定的逻辑图构建真值表。
Boolean expressions use the operators +, ·, and ¬ (or overline) to describe the logic function. For example, the expression Q = ¬(A · B) + C means: first AND A and B, then invert the result, then OR that with C. Brackets indicate the order of operations, just like in arithmetic.
布尔表达式使用运算符 +、· 和 ¬（或上划线）来描述逻辑功能。例如，表达式 Q = ¬(A · B) + C 的意思是：先将 A 和 B 进行与运算，然后将结果取反，再与 C 进行或运算。括号表示运算顺序，就像算术中一样。
When converting between a circuit and a truth table, remember to include columns for intermediate signals. Label each wire with a letter or number and calculate its value for every input row. This systematic approach will prevent careless errors.
在电路和真值表之间转换时，记得为中间信号添加列。用字母或数字标记每条连线，并为每一行输入计算其值。这种系统化的方法可以防止粗心出错。
9. Combining Logic Gates | 组合逻辑门
Most exam questions involve circuits with two or more gates connected in series or parallel. To analyse these circuits, start from the inputs and work toward the final output, writing the Boolean expression for each intermediate node. You can then build the full truth table or simplify the expression.
大多数考题涉及两个或多个以串联或并联方式连接的门组成的电路。要分析这些电路，从输入开始，向最终输出推进，为每个中间节点写出布尔表达式。然后你可以构建完整的真值表或化简表达式。
For example, consider a circuit where inputs A and B feed into an AND gate, and its output together with input C goes into an OR gate. The final output Q = (A · B) + C. Drawing the diagram and verifying with a truth table is a common task.
例如，考虑一个电路，其中输入 A 和 B 进入与门，其输出与输入 C 一起进入或门。最终输出 Q = (A · B) + C。绘制电路图并用真值表验证是一项常见任务。
You should also be able to look at a truth table and determine which combination of gates will produce that behaviour. A good starting point is to identify rows where the output is 1 and write a product term for each, then OR them together (sum of products).
你还应该能够观察真值表并确定哪种门的组合会产生该行为。一个好的起点是识别输出为 1 的行，为每一行写出乘积项，然后将它们相或（积之和形式）。
10. From Truth Table to Circuit | 从真值表到电路
When given a truth table, you can design a two‑level logic circuit using AND gates for product terms and an OR gate to sum them. Each row where the output is 1 gives a product term: if an input is 0, use its complement; if 1, use the true variable. Combine these products with OR gates for the final expression.
当给出真值表时，你可以使用与门实现乘积项、或门实现求和来设计两级逻辑电路。每一输出为 1 的行给出一个乘积项：如果输入为 0，使用其反变量；如果为 1，使用原变量。将这些乘积用或门连接起来得到最终表达式。
As an example, suppose a truth table has output 1 for A=0, B=1 and for A=1, B=0. The sum‑of‑products expression is Q = (¬A · B) + (A · ¬B). This is exactly the XOR function. You can then draw the circuit: two AND gates with appropriate inverters feeding an OR gate.
例如，假设真值表中 A=0, B=1 和 A=1, B=0 时输出为 1。积之和表达式为 Q = (¬A · B) + (A · ¬B)。这恰好是 XOR 功能。然后你可以绘制电路：两个带适当反相器的与门，其输出馈入一个或门。
You must practise drawing circuits neatly with the correct gate symbols and clearly labelled inputs. In CCEA exams, neatness and clarity earn marks just as much as logic.
你必须练习用正确的门符号和清晰标注的输入整齐地绘制电路。在 CCEA 考试中，整洁和清晰与逻辑同样能赢得分数。
11. Common Logic Circuits: Half Adder | 常见逻辑电路：半加器
A half adder is a simple circuit that adds two single‑bit binary numbers (A and B) and produces a sum bit (S) and a carry bit (C). The sum bit is the XOR of the two inputs, and the carry bit is the AND of the two inputs. This circuit appears frequently in IGCSE questions as an application of XOR and AND gates.
半加器是一个简单电路，它将两个单位二进制数（A 和 B）相加，产生和位（S）和进位位（C）。和位是两输入的 XOR，进位位是两输入的 AND。该电路作为 XOR 和 AND 门的应用经常出现在 IGCSE 考题中。
S = A ⊕ B C = A · B
| A | B | S (Sum) | C (Carry) |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
You may also be asked to extend this to a full adder, which accepts an additional carry‑in. However, half adder understanding is enough for most IGCSE CCEA papers. Be ready to draw the circuit using an XOR and an AND gate, and to explain how it works.
你也可能被要求将其扩展到全加器，它接受一个额外的进位输入。不过，对大多数 IGCSE CCEA 试卷来说，理解半加器就足够了。要准备好用一个 XOR 门和一个 AND 门画出电路，并解释其工作原理。
12. Exam Tips and Common Mistakes | 考试技巧与常见错误
Many students lose marks by confusing the symbols for OR and AND, or by forgetting to draw the inversion bubble on NAND and NOR gates. Keep a mental picture of each symbol and double‑check your diagrams. Also, when writing a truth table, ensure you list all possible input combinations in binary counting order (00, 01,
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