A-Level CCEA Computer Science: Boolean Algebra Key Points | CCEA A-Level 计算机：布尔代数考点精讲

📚 A-Level CCEA Computer Science: Boolean Algebra Key Points | CCEA A-Level 计算机：布尔代数考点精讲

Boolean algebra is a cornerstone of digital electronics and computer science. In the CCEA A-Level specification, you are expected to master the manipulation of binary variables, simplification of logic expressions, and the design of efficient digital circuits using gates. This article walks you through every essential topic, from basic operations to Karnaugh maps, with clear explanations and exam-focused tips.

布尔代数是数字电子学和计算机科学的基石。在 CCEA A-Level 课程中，你需要掌握二进制变量的运算、逻辑表达式的化简以及使用门电路设计高效数字电路的方法。本文带你梳理每一个关键知识点，从基本运算到卡诺图，提供清晰解释与应试技巧。

1. Boolean Variables and Constants | 布尔变量与常量

A Boolean variable can only take one of two values: 0 (false) or 1 (true). In digital circuits, these states correspond to low and high voltage levels. Boolean constants are simply fixed values 0 and 1.

布尔变量只能取两个值之一：0（假）或 1（真）。在数字电路中，这两种状态对应低电平和高电平。布尔常量就是固定的 0 或 1。

The three fundamental operations are conjunction (AND), disjunction (OR), and negation (NOT). These operations are defined by truth tables and form the basis of all digital logic.

三种基本运算是与（AND）、或（OR）、非（NOT）。这些运算由真值表定义，是所有数字逻辑的基础。

2. Basic Logic Gates and Truth Tables | 基本逻辑门与真值表

Each logic gate corresponds to a Boolean operation. The primary gates are: AND (output 1 only if all inputs are 1), OR (output 1 if at least one input is 1), and NOT (inverts the input). A truth table lists all possible input combinations and their resulting outputs.

每种逻辑门对应一种布尔运算。基本门包括：与门（仅当所有输入为 1 时输出 1）、或门（至少一个输入为 1 时输出 1）和非门（将输入取反）。真值表列出了所有可能的输入组合及其输出。

AND: symbol · , expression A·B
AND: 符号 · ，表达式 A·B
OR: symbol + , expression A+B
OR: 符号 + ，表达式 A+B
NOT: symbol ‘ or overbar, expression A’ or ¬A
NOT: 符号 ‘ 或上划线，表达式 A’ 或 ¬A

Additionally, NAND (NOT AND) and NOR (NOT OR) are universal gates from which any other gate can be constructed. Their truth tables are the inverse of AND and OR, respectively.

另外，与非门（NAND）和或非门（NOR）是通用门，可以用它们构建任何其他门。它们的真值表分别是与门和或门输出的取反。

XOR (exclusive OR) outputs 1 only when inputs differ; XNOR (exclusive NOR) outputs 1 when inputs are equal. These are essential in arithmetic circuits.

异或门（XOR）仅在输入不同时输出 1；同或门（XNOR）在输入相同时输出 1。它们在算术电路中至关重要。

3. Expressing Logic Functions | 逻辑函数的表示

A Boolean expression can be written as a combination of variables and operators. The two canonical forms are Sum-of-Products (SOP) and Product-of-Sums (POS). In SOP, the expression is a sum (OR) of several product (AND) terms, each term being a minterm. In POS, it is a product (AND) of several sum (OR) terms, called maxterms.

布尔表达式可以写成变量和运算符的组合。两种标准形式是积之和（SOP）和和之积（POS）。在 SOP 中，表达式是几个乘积项（与项）的和（或），每个乘积项称为最小项。在 POS 中，它是几个和项（或项）的积（与），称为最大项。

For example, the function F = A’BC + AB’C + ABC’ is an SOP expression. By reading a truth table, you can derive the SOP by taking the minterms where the output is 1.

例如，函数 F = A’BC + AB’C + ABC’ 是一个 SOP 表达式。通过阅读真值表，你可以取输出为 1 的最小项来得到 SOP 表达式。

It is vital to be able to convert between truth tables, expressions, and circuit diagrams, as CCEA exam questions frequently test these transformations.

能够在真值表、表达式和电路图之间转换非常重要，CCEA 考题经常测试这些转换。

4. Laws of Boolean Algebra | 布尔代数定律

A set of rules governs the simplification of Boolean expressions. You must know and be able to apply the following laws:

一组规则支配着布尔表达式的化简。你必须了解并能应用以下定律：

Commutative Law \| 交换律	A+B = B+A ; A·B = B·A
Associative Law \| 结合律	(A+B)+C = A+(B+C) ; (A·B)·C = A·(B·C)
Distributive Law \| 分配律	A·(B+C) = A·B + A·C ; A+(B·C) = (A+B)·(A+C)
Identity Law \| 同一律	A+0 = A ; A·1 = A
Null Law \| 零律	A+1 = 1 ; A·0 = 0
Idempotent Law \| 幂等律	A+A = A ; A·A = A
Complement Law \| 互补律	A + A’ = 1 ; A·A’ = 0
Involution Law \| 双重否定律	(A’)’ = A
Absorption Law \| 吸收律	A + A·B = A ; A·(A+B) = A

These laws allow you to reduce the number of logic gates needed in a circuit, saving cost and power. Memorising them is essential for the exam, as you will be asked to simplify expressions step by step, citing the law used.

这些定律能减少电路所需逻辑门的数量，从而节省成本和功耗。牢记它们对应试至关重要，因为考题会要求你分步化简表达式并注明所用定律。

5. De Morgan’s Theorems | 德摩根定理

De Morgan’s theorems relate conjunctions and disjunctions via negation. They are frequently used to transform and simplify expressions with multiple negations or to convert between NAND/NOR implementations.

德摩根定理通过取反将合取与析取联系起来。它们常用于转换和化简带有多个取反的表达式，或在不同门电路实现之间进行转换。

(A·B)’ = A’ + B’

(A+B)’ = A’ · B’

The first theorem says that the complement of a product equals the sum of the complements. The second states that the complement of a sum equals the product of the complements. In terms of circuits, a NAND gate is equivalent to an OR gate with inverted inputs; a NOR gate is equivalent to an AND gate with inverted inputs.

第一个定理指出，乘积的补等于补的和。第二个指出，和的补等于补的乘积。在电路层面，与非门等价于输入反相后的或门；或非门等价于输入反相后的与门。

These theorems underpin the universality of NAND and NOR: any Boolean function can be implemented solely with NAND gates or solely with NOR gates. CCEA may ask you to realise a circuit using only NAND gates, requiring systematic application of De Morgan.

这些定理是 NAND 和 NOR 通用性的基础：任何布尔函数都可以仅用与非门或仅用或非门实现。CCEA 可能会要求你只用与非门实现电路，这需要系统性地应用德摩根定理。

6. Algebraic Simplification of Boolean Expressions | 布尔表达式的代数化简

Simplification uses the laws of Boolean algebra to reduce an expression to its minimal form. The goal is to minimise the number of literals (variable appearances) and operators while maintaining the original truth table.

化简使用布尔代数定律将表达式化简为最简形式。目标是在保持原始真值表的前提下，尽量减少字面量（变量出现次数）和运算符的数量。

Consider F = A·B + A·B’. Using the distributive law: F = A·(B + B’) = A·1 = A. This eliminates one literal and simplifies the circuit to a single wire!

考虑 F = A·B + A·B’。使用分配律：F = A·(B + B’) = A·1 = A。这减少了一个字面量，并将电路简化为一条导线！

When simplifying, use a clear sequence: first apply Idempotent, Complement, and Null laws to eliminate obvious redundancies; then Absorption to remove terms; finally Distributive to factor and cancel. Always show working to gain method marks.

化简时，使用清晰的顺序：首先应用幂等律、互补律和零律消除明显的冗余；然后使用吸收律删除项；最后用分配律提取公因式和消去。一定要写出步骤以获得过程分。

7. Introduction to Karnaugh Maps | 卡诺图简介

Karnaugh Maps (K-maps) provide a visual method for simplifying Boolean functions of up to four variables. A K-map is a grid where each cell represents a minterm, arranged so that adjacent cells differ by only one input variable (Gray code ordering).

卡诺图（K-map）为不超过四个变量的布尔函数提供了一种直观的化简方法。卡诺图是一个网格，每个单元格代表一个最小项，排列方式使得相邻单元格仅有一个输入变量不同（格雷码顺序）。

For a two-variable function (A, B), the map is a 2×2 grid. For three variables, a 2×4 grid; for four variables, 4×4. The cells corresponding to the outputs that are 1 are marked with 1, and those where the function is 0 are marked 0 (or left blank).

对于两变量函数 (A, B)，卡诺图是一个 2×2 网格。三变量用 2×4，四变量用 4×4。将函数输出为 1 的单元格标为 1，输出为 0 的单元格标为 0（或留空）。

The real power of K-maps lies in identifying groups of adjacent 1s that can be combined into simpler product terms. CCEA exams often ask you to draw a K-map from a truth table or expression and then find the minimal SOP.

卡诺图的真正威力在于识别相邻的 1 组成的矩形组，这些组可以合并为更简单的乘积项。CCEA 考试经常要求根据真值表或表达式绘制卡诺图，然后找出最简 SOP。

8. Grouping Rules and Minimisation with K-Maps | 卡诺图合并规则与最小化

Groups in a K-map must be rectangular and contain 1, 2, 4, or 8 cells (powers of two). They must be as large as possible to yield simpler terms. Overlapping groups are allowed, and all 1s must be covered at least once.

卡诺图中的合并组必须是矩形，包含 1、2、4 或 8 个单元格（2 的幂）。组应尽可能大，以获得更简单的项。允许组之间重叠，并且所有标1的单元格必须至少被覆盖一次。

A group of two 1s eliminates one variable that changes within the group. | 两个 1 的组消除在组内发生变化的一个变量。
A group of four 1s eliminates two variables. | 四个 1 的组消除两个变量。
A group of eight 1s eliminates three variables. | 八个 1 的组消除三个变量。

To obtain the minimal expression, write a product term for each group, including only the variables that remain constant throughout the group. Then OR all the terms together.

要得到最简表达式，为每一组写出乘积项，只包含在该组内保持不变的变量。然后将所有项进行或运算。

Be aware of ‘don’t care’ conditions, denoted by X. These are input combinations that either never occur or for which the output does not matter. You may treat an X as 0 or 1 to make a group larger, further simplifying the expression.

注意“无关项”条件，用 X 表示。这些是永远不会出现的输入组合或输出不影响功能的情况。你可以将 X 视为 0 或 1 以扩大合并组，从而进一步简化表达式。

9. Converting Between SOP and POS Using K-Maps | 用卡诺图实现 SOP 与 POS 的转换

While minimisation usually targets Sum-of-Products, you can also derive a minimal Product-of-Sums expression from the same K-map. Instead of grouping 1s, group the 0s and write the sum term for each group of zeros, then AND all terms together. The variables in a POS maxterm are the complements of those in the corresponding SOP minterm.

虽然最小化通常针对积之和（SOP），你也可以从同一张卡诺图推导最简和之积（POS）表达式。不是将1分组，而是将0分组，为每一组0写出和项，然后将所有项进行与运算。POS 最大项中的变量是相应 SOP 最小项中变量的补。

For example, if grouping 0s gives the term (A+B), the final POS expression is something like (A+B)·(A’+C). This dual approach is useful when a truth table contains mostly 1s: grouping the few 0s may require fewer gates.

例如，如果为 0 分组得到项 (A+B)，最终 POS 表达式类似于 (A+B)·(A’+C)。当真值表大部分为 1 时，这种对偶方法很有用：为少数 0 分组可能需要更少的门。

CCEA may ask you to realise a circuit with a specific type of gate, e.g., only NOR gates, which are naturally suited to POS implementation. Knowing how to switch between SOP and POS is therefore a key skill.

CCEA 可能会要求你用特定类型的门实现电路，例如只用或非门，这自然适用于 POS 实现。因此，掌握 SOP 和 POS 之间的切换是一项关键技能。

10. From Expression to Circuit Diagram | 从表达式到电路图

Once a simplified Boolean expression is obtained, you must be able to draw the corresponding logic circuit. Each product (AND) term is implemented with an AND gate; the sum (OR) of these terms uses an OR gate. Inverters are placed on inputs wherever a variable appears complemented.

一旦得到化简后的布尔表达式，你必须能够画出相应的逻辑电路。每个乘积（与）项用与门实现；这些项的或运算使用或门。在变量以补码形式出现的地方，要在输入端放置反相器。

A common exam task is: ‘Using only NAND gates, realise the function F = A·B + C’. First, double-negate the whole expression: F = (A·B + C)”. Apply De Morgan to the inner complement: F = ((A·B)’·C’)’. This expression uses only NAND operations, and can be drawn with three NAND gates.

一个常见的考试题型是：“仅用与非门实现函数 F = A·B + C”。首先，对整个表达式取双重否定：F = (A·B + C)”。对内层补码应用德摩根定理：F = ((A·B)’·C’)’。此表达式仅使用与非操作，可以用三个与非门画出来。

Be systematic: label all input and output lines clearly, indicate complements, and ensure the layout matches the evaluation order of the Boolean operators. Marks are awarded for correct labelling and gate types.

要条理清晰：清楚地标记所有输入输出线，标明补码，并确保版图与布尔运算符的求值顺序一致。正确标记和门类型都会得分。

11. Common Exam Pitfalls and Tips | 常见考试陷阱与提示

Misremembering De Morgan’s laws – watch the placement of the complement and the change of operator. A single missing inversion can invalidate a whole circuit. Always check your final circuit against the truth table.

记错德摩根定律——注意补码的位置和运算符的变化。一个遗漏的取反可能导致整个电路无效。始终对照真值表检查最终电路。

In K-maps, forgetting to treat the edges as adjacent can cost you a larger grouping. Remember: the first and last columns, and first and last rows, are neighbours. Loop them as if the map wraps around a cylinder or torus.

在卡诺图中，忘记将边缘视为相邻可能会错失更大的合并组。记住：第一列和最后一列、第一行和最后一行是相邻的。像卷成圆柱或环面一样将它们圈起来。

When applying Boolean algebra, many students miss the opportunity to use the Absorption law. Always look for patterns like A + A·B to reduce immediately to A before expanding further.

在应用布尔代数时，许多学生错过了使用吸收律的机会。寻找类似 A + A·B 的模式，在进一步展开前立即化简为 A。

Finally, in timed exams, converting a truth table directly into a K-map is often faster than algebraic manipulation for up to four variables. Practice both methods to choose the most efficient path.

最后，在限时考试中，对于不超过四个变量的函数，直接将真值表转换为卡诺图往往比代数推导更快。两种方法都要练习，以选择最高效的路径。

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A-Level CCEA Computer Science: Boolean Algebra Key Points | CCEA A-Level 计算机：布尔代数 考点精讲