📚 Boolean Algebra Key Points | 布尔代数考点精讲
Boolean algebra forms the very foundation of digital logic and computer science. For your IGCSE CCEA Computer Science exam, mastering its laws, truth tables, logic gates, and simplification techniques is essential. This article breaks down every crucial concept you need to know, from basic operators to Karnaugh maps, with clear examples and paired English-Chinese explanations to boost your understanding and exam confidence.
布尔代数是数字逻辑和计算机科学的基石。针对 IGCSE CCEA 计算机科学考试，掌握其定律、真值表、逻辑门和化简技巧至关重要。本文将从基本运算符到卡诺图，逐一剖析所有关键概念，配以清晰的英文-中文对照解释，帮助你加深理解并提升考试信心。
1. Boolean Variables and Constants | 布尔变量与常量
In Boolean algebra, variables can only take one of two values: 0 or 1. 0 typically represents FALSE, OFF, or LOW, while 1 represents TRUE, ON, or HIGH. A Boolean constant is simply a fixed value of either 0 or 1. Every expression you build uses these binary values, making the algebra perfect for representing the on/off states in digital circuits.
在布尔代数中，变量只能取两个值之一：0 或 1。0 通常表示假、关或低电平，而 1 表示真、开或高电平。布尔常量就是固定的 0 或 1 值。你构建的每一个表达式都使用这些二进制值，使布尔代数非常适合表示数字电路中的开/关状态。
2. Basic Logic Operators (AND, OR, NOT) | 基本逻辑运算符（与、或、非）
The three fundamental operations are AND (·), OR (+), and NOT (‾). AND gives 1 only when all inputs are 1. A · B = 1 if and only if A = 1 and B = 1. OR gives 1 when at least one input is 1. A + B = 1 if A = 1 or B = 1 or both. NOT, also called inversion, flips the value: if A = 0 then NOT A = 1, written as Ā or A’.
三种基本运算是与（·）、或（+）和非（‾）。与运算仅当所有输入都为 1 时输出 1。A · B = 1 当且仅当 A = 1 且 B = 1。或运算只要至少一个输入为 1 就输出 1。A + B = 1 当 A = 1 或 B = 1 或两者均为 1。非运算也称为取反，翻转数值：若 A = 0 则 NOT A = 1，写作 Ā 或 A’。
3. Truth Tables for Basic Gates | 基本门电路的真值表
A truth table lists all possible input combinations and their corresponding output for a logic gate. For a 2-input AND gate, the output column is 1 only for the last row (A=1, B=1). For OR, output is 1 for all rows except A=0, B=0. For NOT, a simple table with A and F: F = Ā. These tables are the simplest way to verify Boolean expressions and are heavily tested in CCEA exams.
真值表列出了逻辑门所有可能的输入组合及其对应的输出。对于双输入与门，输出列仅在最后一行（A=1, B=1）为 1。对于或门，除了 A=0, B=0 外，所有行的输出均为 1。对于非门，简单的表格包括 A 和 F：F = Ā。这些表格是验证布尔表达式最简单的方法，在 CCEA 考试中频繁出现。
| A | B | A · B | A + B |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 |
4. Laws of Boolean Algebra | 布尔代数定律
Boolean algebra follows a set of laws that allow you to manipulate and simplify expressions. The commutative law states A + B = B + A and A · B = B · A. The associative law says (A + B) + C = A + (B + C) and (A · B) · C = A · (B · C). The distributive law is crucial: A · (B + C) = A · B + A · C; also A + (B · C) = (A + B) · (A + C). Identity laws: A + 0 = A, A · 1 = A. Complement laws: A + Ā = 1, A · Ā = 0. Idempotent laws: A + A = A, A · A = A. Involution law: double NOT returns original, (Ā)̄ = A. These laws are the toolkit for any simplification problem.
布尔代数遵循一系列定律，可用于处理和化简表达式。交换律指出 A + B = B + A 以及 A · B = B · A。结合律为 (A + B) + C = A + (B + C) 和 (A · B) · C = A · (B · C)。分配律至关重要：A · (B + C) = A · B + A · C；此外还有 A + (B · C) = (A + B) · (A + C)。恒等律：A + 0 = A，A · 1 = A。互补律：A + Ā = 1，A · Ā = 0。幂等律：A + A = A，A · A = A。还原律：双重否定回到原值，(Ā)̄ = A。这些定律是解决任何化简问题的工具箱。
5. De Morgan’s Theorems | 德摩根定理
De Morgan’s theorems are vital for converting between AND and OR expressions with NOT. Theorem 1: The complement of a sum equals the product of the complements. (A + B)̄ = Ā · B̄. Theorem 2: The complement of a product equals the sum of the complements. (A · B)̄ = Ā + B̄. These are often used to simplify circuits using only NAND or NOR gates. In exams, you must be able to apply them step by step, breaking the bar over multiple variables.
德摩根定理对于在带有非运算的与和或表达式之间进行转换至关重要。定理 1：和式的非等于各变量非的积。(A + B)̄ = Ā · B̄。定理 2：积式的非等于各变量非的和。(A · B)̄ = Ā + B̄。这些定理常被用来简化电路，使其仅使用与非门或或非门。在考试中，你必须能逐步应用它们，将多个变量上的横线分解。
6. Logic Gate Symbols and Equivalent Circuits | 逻辑门符号与等效电路
CCEA exams require you to recognise and draw standard logic gate symbols. The AND gate is a D‑shape with a flat nose, OR is a curved shield, and NOT is a triangle with a small bubble. NAND is an AND followed by a bubble, NOR is an OR with a bubble. XOR is an OR with an extra curved line on the input side. You might be asked to draw a circuit from a Boolean expression, or to derive the expression from a given diagram. Always label inputs and outputs clearly.
CCEA 考试要求你识别并绘制标准逻辑门符号。与门是一个平头的 D 形，或门是弯曲的盾形，非门是一个带小圆圈的三角形。与非门是与门后面加一个小圆圈，或非门是或门加小圆圈。异或门是输入侧多一条弧线的或门。你可能会被要求根据布尔表达式画出电路，或从给定的电路图推导出表达式。务必清晰标注输入和输出。
Additionally, you should understand that any Boolean expression can be implemented using only NAND gates or only NOR gates. This is called universality. For instance, an AND gate can be made from two NAND gates: the first NAND with inputs A and B, the second NAND acting as an inverter by tying its inputs together.
此外，你应明白任何布尔表达式都可以仅用与非门或仅用或非门来实现，这被称为通用性。例如，一个与门可以由两个与非门构成：第一个与非门输入为 A 和 B，第二个与非门通过将其输入端连接在一起充当非门。
7. Simplifying Boolean Expressions Using Algebraic Methods | 用代数方法化简布尔表达式
Simplification reduces the cost and complexity of digital circuits. You use the laws repeatedly. For example, simplify A · B + A · B̄. Factor A: A · (B + B̄). Since B + B̄ = 1, this becomes A · 1 = A. Another example: X + X̄ · Y. Using the distributive law in alternative form: X + X̄ · Y = (X + X̄) · (X + Y) = 1 · (X + Y) = X + Y. Always aim for the minimal sum-of-products or minimal gate count. Practice recognising common patterns like absorption (A + A · B = A) and redundancy.
化简可以减少数字电路的成本和复杂度。你需要反复使用定律。例如，化简 A · B + A · B̄。提取公因子 A：A · (B + B̄)。由于 B + B̄ = 1，因此变为 A · 1 = A。另一个例子：X + X̄ · Y。使用分配律的另一种形式：X + X̄ · Y = (X + X̄) · (X + Y) = 1 · (X + Y) = X + Y。始终力求得到最简的积之和形式或最少的门数量。通过练习识别常见模式，如吸收律（A + A · B = A）和冗余律。
8. Sum of Products (SOP) and Product of Sums (POS) | 积之和与和之积形式
Boolean expressions can be written in two standard forms. Sum of Products (SOP) is an OR of AND terms, e.g., ĀB + AB̄. Product of Sums (POS) is an AND of OR terms, e.g., (A + B) · (Ā + B̄). Any truth table can be converted into SOP by focusing on rows where output = 1. For each such row, AND the inputs (inverting those equal to 0). Then OR all these minterms together. For POS, focus on rows where output = 0, write maxterms (OR of inputs, inverting those equal to 1), and AND them. CCEA expects you to convert between truth tables and both forms.
布尔表达式可以写成两种标准形式。积之和（SOP）是与项的或运算，例如 ĀB + AB̄。和之积（POS）是或项的与运算，例如 (A + B) · (Ā + B̄)。任何真值表都可以通过关注输出为 1 的行转换为 SOP。对于每一个这样的行，将输入相与（对等于 0 的输入取反）。然后将所有这些最小项相或。对于 POS，关注输出为 0 的行，写出最大项（输入的或运算，对等于 1 的取反），并将它们相与。CCEA 期望你能够在真值表和这两种形式之间进行转换。
9. Deriving Expressions from Truth Tables | 从真值表推导表达式
Suppose a truth table gives output F = 1 for inputs A=0, B=1 (row 2) and A=1, B=1 (row 4). For row 2, the minterm is Ā B (since A=0 invert it, B=1 keep it). For row 4, the minterm is A B. The SOP expression is F = ĀB + AB. You can then simplify this algebraically to F = B(Ā + A) = B · 1 = B. So the entire function reduces to just B. This method is systematic and guarantees full marks if steps are shown clearly.
假设一个真值表在输入 A=0, B=1（第 2 行）和 A=1, B=1（第 4 行）时输出 F = 1。对于第 2 行，最小项为 Ā B（因为 A=0 取反，B=1 保留）。对于第 4 行，最小项为 A B。SOP 表达式为 F = ĀB + AB。然后你可以通过代数化简得到 F = B(Ā + A) = B · 1 = B。因此整个函数简化为仅 B。这种方法系统性强，如果步骤展示清晰，可确保拿到满分。
10. Introduction to Karnaugh Maps (K‑maps) | 卡诺图简介
Karnaugh maps offer a visual method for simplifying Boolean expressions up to 4 variables. A 2-variable K-map is a 2×2 grid with cells representing minterms: headings for A and B. You fill the grid with 1s from the truth table output. Group adjacent 1s in rectangles of size 1, 2, or 4 (powers of 2). Each group gives a simplified term where a variable that changes is eliminated. The final expression is the OR of each group’s simplified term. K-maps are typically faster and less error-prone than algebraic manipulation for many problems.
卡诺图为最多 4 个变量的布尔表达式化简提供了一种可视化方法。双变量卡诺图是一个 2×2 的网格，每个单元格代表一个最小项：标题为 A 和 B。你根据真值表的输出在网格中填入 1。将相邻的 1 按 1、2 或 4 个（2 的幂次）的矩形进行分组。每个分组给出一个化简后的项，其中发生变化的变量被消去。最终表达式为每组化简项的或运算。对于许多问题，卡诺图通常比代数运算更快且不易出错。
For example, for F = Σ(1, 3) on a map with A on rows and B on columns: cell m1 (ĀB) and m3 (AB) are adjacent vertically. Grouping them yields the term B, since A changes (0 and 1). So F = B.
例如，对于 F = Σ(1, 3) 在 A 为行、B 为列的卡诺图上：单元格 m1 (ĀB) 和 m3 (AB) 在垂直方向相邻。将它们分组得到项 B，因为 A 发生变化（0 和 1）。因此 F = B。
11. Don’t Care Conditions and Simplification | 无关项与化简
Sometimes, certain input combinations never occur in a design, or their output value doesn’t matter. These are called ‘don’t care’ conditions, denoted by X or d in truth tables and K-maps. You can treat a don’t care as either 0 or 1, whichever makes the largest grouping of 1s, further simplifying the circuit. In a K-map, include X cells in a group if it helps enlarge that group; otherwise ignore them. CCEA may ask you to use don’t care terms to achieve a minimal expression.
有时，某些输入组合在设计里永远不会出现，或者其输出值无关紧要。这些被称为“无关项”，在真值表和卡诺图中用 X 或 d 表示。你可以将无关项视为 0 或 1，选择能使 1 的分组最大化的值，从而进一步化简电路。在卡诺图中，如果有助于扩大分组，则将 X 纳入该组；否则忽略它们。CCEA 可能会要求你利用无关项获得最简表达式。
12. Combinational Logic Circuit Analysis | 组合逻辑电路分析
In an exam, you could be given a circuit diagram and asked to determine the output Boolean expression and truth table. Work from left to right, labelling the output of each gate. Write the expression for each gate’s output in terms of the inputs. For example, a circuit with input A going to a NOT producing Ā, then that and B going to an AND gate gives Ā · B. An OR combining that with another term produces the final F. Then construct the truth table by evaluating all input combinations. Always double-check your algebra by comparing with the truth table derived from the original diagram.
在考试中，你可能会看到一个电路图，并被要求确定输出的布尔表达式和真值表。从左到右分析，标注每个门的输出。用输入写出每个门输出的表达式。例如，一个电路输入 A 经过非门产生 Ā，然后该输出与 B 进入与门得到 Ā · B。一个或门将这个项与另一个项组合产生最终的 F。然后通过计算所有输入组合构建真值表。务必通过与原图推导的真值表对比来检查你的代数式。
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