📚 Logic Networks | 逻辑网络
Logic networks form a bridge between abstract mathematical reasoning and the physical circuits that power modern computers. In IB Mathematics, understanding logic networks means learning how simple binary conditions — true or false, 1 or 0 — can be combined using gates to perform complex decision‑making. This topic blends Boolean algebra, truth tables, and Karnaugh maps into a powerful toolkit for designing and simplifying digital systems. Whether you are analysing a simple light‑switch circuit or building the control unit of a processor, logic networks give you the language to describe and optimise how information flows.
逻辑网络是抽象数学推理与驱动现代计算机的物理电路之间的桥梁。在IB数学中，理解逻辑网络意味着学习如何使用门电路将简单的二进制状态——真或假、1或0——组合起来，完成复杂的决策。这一主题将布尔代数、真值表和卡诺图融合成一个强大的工具包，用于设计和简化数字系统。无论你是在分析一个简单的电灯开关电路，还是在构建处理器的控制单元，逻辑网络都能为你提供描述和优化信息流的方式。
1. What Is a Logic Network? | 什么是逻辑网络？
A logic network is a diagrammatic representation of a Boolean function, where inputs pass through a series of logic gates to produce an output. Each input can take only two values — typically 0 (false) and 1 (true). The network shows how these binary signals interact, using gates such as AND, OR, and NOT. By tracing the connections and applying the rules of Boolean algebra, you can determine the output for every possible combination of inputs. In IB problems, you may be asked to draw a network from an expression, write the expression for a given diagram, or simplify a network using algebraic laws.
逻辑网络是布尔函数的图形表示，输入信号通过一系列逻辑门后产生输出。每个输入只能取两个值——通常为0（假）和1（真）。网络展示了这些二进制信号如何利用与门、或门和非门等相互作用。通过追踪连接并应用布尔代数规则，你可以确定每种可能输入组合对应的输出。在IB问题中，你可能需要根据表达式绘制网络、为给定的电路图写出表达式，或利用代数定律简化网络。
2. Basic Logic Gates | 基本逻辑门
The three fundamental gates are AND, OR, and NOT. An AND gate outputs 1 only when all its inputs are 1; its operation is represented by a dot: X = A · B. An OR gate outputs 1 if at least one input is 1, written as X = A + B. A NOT gate, or inverter, has a single input and flips its value: X = A’ (or ‾A). More advanced gates — NAND, NOR, XOR, and XNOR — are built from combinations of these three. The NAND gate is an AND followed by a NOT, giving X = (A · B)’. NOR is X = (A + B)’. XOR outputs 1 when the inputs differ: X = A ⊕ B = A’·B + A·B’. XNOR gives 1 when inputs are equal: X = (A ⊕ B)’.
三个基本门是与门、或门和非门。与门仅在所有输入均为1时输出1；其运算用点表示：X = A · B。或门只要至少一个输入为1就输出1，写作X = A + B。非门（反相器）只有一个输入，并将其值翻转：X = A’（或‾A）。更高级的门——与非门、或非门、异或门和同或门——由这三种门组合而成。与非门是与门后接非门，即X = (A · B)’。或非门为X = (A + B)’。异或门在输入不同时输出1：X = A ⊕ B = A’·B + A·B’。同或门在输入相同时输出1：X = (A ⊕ B)’。
3. Truth Tables | 真值表
A truth table lists every possible combination of input values and the resulting output for a logic network. For n input variables there are 2ⁿ rows. To build a truth table, write the inputs in binary counting order, then evaluate the expression step by step. The table offers a complete and unambiguous description of the network’s behaviour. When two expressions produce identical truth tables, they are logically equivalent — a key idea used in simplification.
真值表列出了所有可能的输入值组合以及逻辑网络的对应输出。对于n个输入变量，共有2ⁿ行。构建真值表时，先按二进制计数顺序写出输入组合，然后逐步计算表达式。真值表完整且无歧义地描述了网络的行为。当两个表达式产生相同的真值表时，它们在逻辑上等价——这是用于简化的重要思想。
| A | B | A · B | A + B | A’ | (A · B)’ |
|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 1 | 1 |
| 0 | 1 | 0 | 1 | 1 | 1 |
| 1 | 0 | 0 | 1 | 0 | 1 |
| 1 | 1 | 1 | 1 | 0 | 0 |
4. Boolean Expressions | 布尔表达式
A Boolean expression is a string of variables, constants (0 and 1), and operators (·, +, ‘) that defines a logic network algebraically. For instance, F = A’·B + A·B’ represents the XOR function. The order of operations is: parentheses first, then NOT, then AND, and finally OR — similar to arithmetic but with different meanings. When converting a network to an expression, start by labelling the output of each gate, then substitute backwards until you reach the network input.
布尔表达式是由变量、常量（0和1）以及运算符（·, +, ‘）组成的字符串，以代数方式定义逻辑网络。例如，F = A’·B + A·B’ 表示异或函数。运算顺序为：先括号，然后非，再与，最后或——与算术运算类似但含义不同。将网络转换为表达式时，先标出每个门的输出，然后向前逐步代入，直至到达网络输入端。
5. Logic Network Diagrams | 逻辑网络图
Drawing a logic network diagram requires standard symbols: a flat‑backed shape for AND, a curved‑back shape for OR, a triangle with a bubble for NOT, and gates with added bubbles for NAND and NOR. Inputs are placed on the left, outputs on the right. Each gate’s output becomes the input for the next stage, unless a branch feeds the same signal to multiple gates. When drawing from an expression, identify the last operation (usually OR) and place that gate at the rightmost position, then work leftwards through sub‑expressions.
绘制逻辑网络图需要使用标准符号：平背形状表示与门，弯背形状表示或门，带小圆的三角形表示非门，以及带小圆的与非门和或非门。输入放在左侧，输出放在右侧。每个门的输出成为下一级的输入，除非分支将同一信号馈送给多个门。根据表达式绘图时，先识别最后的运算（通常是或运算），将该门放在最右侧，然后向左逐个处理子表达式。
6. Laws of Boolean Algebra | 布尔代数定律
Boolean algebra is governed by a set of identities that let you manipulate expressions without changing their truth tables. The most important laws include: commutative laws (A + B = B + A, A·B = B·A), associative laws (A + (B + C) = (A + B) + C, similarly for AND), distributive laws (A·(B + C) = A·B + A·C, A + B·C = (A + B)·(A + C)), identity laws (A + 0 = A, A·1 = A), complement laws (A + A’ = 1, A·A’ = 0), and De Morgan’s theorems: (A·B)’ = A’ + B’ and (A + B)’ = A’·B’. These laws are essential for simplifying circuits.
布尔代数受一组恒等式支配，这些恒等式允许你在不改变真值表的情况下变换表达式。最重要的定律包括：交换律（A + B = B + A，A·B = B·A）、结合律（A + (B + C) = (A + B) + C，与运算同理）、分配律（A·(B + C) = A·B + A·C，A + B·C = (A + B)·(A + C)）、同一律（A + 0 = A，A·1 = A）、互补律（A + A’ = 1，A·A’ = 0）以及德·摩根定理：(A·B)’ = A’ + B’ 和 (A + B)’ = A’·B’。这些定律对于简化电路至关重要。
7. Simplifying Logic Networks | 简化逻辑网络
Simplification reduces the number of gates and connections in a network, which lowers cost and power consumption in physical circuits. The standard method is to apply the laws of Boolean algebra to eliminate redundant terms. For example, the expression F = A·B + A·B’ can be factored as A·(B + B’) = A·1 = A, revealing that the output depends only on A. Another common technique is to absorb terms using A + A·B = A. Always check your simplified expression by constructing or comparing truth tables.
简化可以减少网络中的门数量和连线，从而降低物理电路的成本和功耗。标准方法是应用布尔代数定律消去冗余项。例如，表达式F = A·B + A·B’ 可因式分解为 A·(B + B’) = A·1 = A，揭示出输出仅依赖于A。另一种常用技巧是利用A + A·B = A吸收项。简化后务必通过构造或比较真值表来检查表达式。
8. Karnaugh Maps | 卡诺图
A Karnaugh map (K‑map) is a graphical tool for simplifying Boolean expressions with up to four variables. It arranges the truth table rows in a grid so that adjacent cells differ by only one variable. Groups of 1s that are powers of two (1, 2, 4, 8) are circled, and each group corresponds to a product term where the variable that is constant across the group is kept, while the variable that changes is eliminated. The final simplified expression is the sum of the essential prime implicants. IB examinations often require you to draw a K‑map from a truth table or an expression, and then write the minimal sum‑of‑products form.
卡诺图（K‑map）是一种用于简化最多四个变量的布尔表达式的图形工具。它将真值表的各行排列在网格中，使相邻单元格仅有一个变量不同。圈出大小为2的幂（1、2、4、8）的1组，每一组对应一个乘积项，其中在组内保持不变的变量被保留，变化的变量被消除。最终的简化表达式是所有必要质蕴含项的和。IB考试经常要求你根据真值表或表达式画出卡诺图，然后写出最简积之和形式。
9. Combining Gates: NAND and NOR Universality | 门电路的组合：NAND和NOR的通用性
NAND and NOR gates are called universal gates because any Boolean function can be implemented using only NAND gates, or only NOR gates. To build an inverter from a NAND gate, tie both inputs together: X = (A·A)’ = A’. To make an AND, follow a NAND with an inverter. Similarly, a NOR gate can create all other functions. This property is extremely useful in manufacturing, as it allows entire circuits to be built from a single gate type, simplifying chip design.
与非门和或非门被称为通用门，因为任何布尔函数都可以仅用与非门或仅用或非门来实现。要用与非门构建一个反相器，只需将两个输入连接在一起：X = (A·A)’ = A’。要得到与门，可在与非门后接一个反相器。同样，或非门也能生成所有其他函数。这一特性在制造中极为有用，因为它允许整个电路由单一类型的门构建，从而简化芯片设计。
10. Designing Logic Networks from Truth Tables | 从真值表设计逻辑网络
Given a truth table, you can obtain a logic network by writing a sum‑of‑products (SOP) expression. For each row where the output is 1, create a product (AND) term that is true only for that row: for input 0 use the complemented variable, for 1 use the uncomplemented variable. Sum (OR) all these product terms together. Then simplify the SOP using Boolean algebra or a K‑map. Alternatively, you may design from a product‑of‑sums (POS) by considering rows with output 0. The choice between SOP and POS often depends on which gives a simpler network.
给定一个真值表，你可以通过写出积之和（SOP）表达式来得到逻辑网络。对于输出为1的每一行，创建一个仅在该行为真的与项：输入为0时使用反变量，为1时使用原变量。将所有这样的与项通过或运算相加。然后利用布尔代数或卡诺图简化该SOP表达式。或者，你可以从输出为0的行出发设计成和之积（POS）形式。选择SOP还是POS常常取决于哪种形式能产生更简单的网络。
11. Applications of Logic Networks | 逻辑网络的应用
Logic networks are not just academic exercises; they are the foundation of digital electronics. An adder circuit inside a processor uses XOR and AND gates to perform binary addition. A multiplexer selects one of several input signals using control bits. Even simple everyday devices like a thermostat controller or a vending machine rely on logic networks to make decisions. In IB Mathematics, contextual problems may ask you to model a real‑world scenario — such as an alarm system that triggers only when certain combinations of sensors are activated — and then design the corresponding logic network.
逻辑网络不仅是学术练习；它们是数字电子技术的基础。处理器内部的加法器电路使用异或门和与门执行二进制加法。多路选择器利用控制位从多个输入信号中选择一路。即使是像恒温控制器或自动售货机这样的简单日常设备，也依赖逻辑网络来做决策。在IB数学中，情境问题可能会要求你为一个现实场景建模——例如一个只有在特定传感器组合被触发时才响应的报警系统——然后设计相应的逻辑网络。
12. Summary and Practice | 总结与练习
Mastering logic networks requires fluency in moving between expressions, truth tables, Karnaugh maps, and circuit diagrams. Start by memorising the basic gate symbols and their Boolean operators. Practice evaluating simple expressions and building truth tables. When you encounter a complex network, break it down into smaller sub‑functions, simplify each part where possible, and reassemble. Work through past IB problems where you are asked to simplify an expression to a minimal form and then implement it using NAND gates only. Remember to always verify your simplified result against the original truth table.
掌握逻辑网络需要能够在表达式、真值表、卡诺图和电路图之间自如转换。首先要记住基本门符号及其布尔运算符。练习计算简单表达式并构建真值表。遇到复杂网络时，把它拆分成较小的子函数，尽可能简化每个部分，然后再重新组合。反复练习IB历年真题，其中会要求你将表达式化为最简形式，然后仅用与非门实现。请始终对照原始真值表验证你的简化结果。
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