IGCSE Computer Science | IGCSE计算机：计算机体系结构核心考点

📚 IGCSE Computer Science | IGCSE计算机：计算机体系结构核心考点

The central processing unit (CPU) is the brain of the computer. Understanding its internal architecture, the flow of data, and the roles of each component is essential for any IGCSE Computer Science student. This article breaks down the key concepts of computer architecture as required by the CIE syllabus.

中央处理器（CPU）是计算机的大脑。理解其内部架构、数据流动方式以及每个组件的作用，对每一位 IGCSE 计算机科学的学生来说都至关重要。本文根据 CIE 考纲，系统梳理计算机体系结构的核心考点。

---

1. The Von Neumann Architecture | 冯·诺依曼体系结构

The Von Neumann architecture describes a computer system where the data and instructions are stored in the same memory unit. This “stored program” concept means that both the program instructions and the data they operate on reside together in main memory, and the CPU fetches them sequentially using a single system bus.

冯·诺依曼体系结构描述了这样一种计算机系统：数据和指令存储在同一存储单元中。这种”存储程序”概念意味着程序指令与其操作的数据共同存放在主存储器中，CPU 通过单一系统总线按顺序获取它们。

Key features of this model include:

• Instructions and data are stored in the same memory space.
• Instructions are executed one at a time in a sequential manner.
• A single set of buses (address, data, and control) transfers both instructions and data.

• 指令和数据存储在同一个存储空间中。
• 指令按顺序逐条执行。
• 一组总线（地址总线、数据总线和控制总线）同时传输指令和数据。

Main Memory ↔ Bus ↔ CPU (ALU + Control Unit + Registers)

主存储器 ↔ 总线 ↔ CPU（ALU + 控制单元 + 寄存器）

---

2. The Harvard Architecture | 哈佛体系结构

The Harvard architecture uses physically separate memory and buses for instructions and data. This allows the CPU to read an instruction and access data simultaneously, improving processing speed. However, it is more complex and expensive to implement.

哈佛体系结构为指令和数据分别使用物理上独立的存储器和总线。这使得 CPU 可以同时读取指令和访问数据，从而提高处理速度。然而，它的实现更复杂、成本更高。

The key differences between Von Neumann and Harvard architectures are:

Feature | 特征	Von Neumann | 冯·诺依曼	Harvard | 哈佛
Memory | 存储器	Single shared memory | 单一共享存储器	Separate memory for data and instructions | 数据与指令分离存储
Buses | 总线	One set of buses | 一组总线	Dedicated buses for each | 各自独立的总线
Speed | 速度	Slower due to bottlenecks | 因瓶颈问题较慢	Faster due to parallel access | 因并行访问更快
Typical use | 典型应用	General-purpose computers | 通用计算机	Embedded systems, DSPs | 嵌入式系统、数字信号处理器

For the CIE exam, remember that most modern general-purpose computers are Von Neumann machines, while Harvard architecture is common in specialised processors.

应考提示：CIE 考试中需牢记，大多数现代通用计算机属于冯·诺依曼结构，而哈佛结构常见于专用处理器中。

---

3. The Core Components of the CPU | CPU 的核心组件

The CPU comprises several key components that work together. The IGCSE syllabus requires you to know the function of each one clearly. These components are:

CPU 由若干关键组件协同工作。IGCSE 考纲要求你清楚地了解每一个组件的作用。这些组件包括：

• Arithmetic Logic Unit (ALU): Performs arithmetic operations (addition, subtraction) and logic operations (AND, OR, NOT, comparison).
• Control Unit (CU): Coordinates the activities of the CPU by directing the flow of data and instructions. It generates control signals for other components.
• Cache: A small, fast memory located inside the CPU that stores frequently used instructions and data to speed up processing.
• Registers: High-speed storage locations inside the CPU used for temporary data during processing.
• Clock: Generates a timing signal that sends pulses to synchronise the operations of the CPU.

• 算术逻辑单元（ALU）：执行算术运算（加、减）和逻辑运算（与、或、非、比较）。
• 控制单元（CU）：通过指挥指令和数据的流动来协调 CPU 的所有活动，并为其他部件生成控制信号。
• 高速缓存（Cache）：位于 CPU 内部的小容量高速存储器，存储频繁使用的指令和数据以加速处理。
• 寄存器（Registers）：CPU 内部的高速临时存储位置，用于处理过程中的临时数据。
• 时钟（Clock）：产生定时信号，发送脉冲以同步 CPU 的各项操作。

---

4. Essential Registers You Must Know | 必须掌握的寄存器

Registers are a common exam topic. You need to know the name, full form, and function of each register. The table below summarises the essential registers for the IGCSE exam.

寄存器是高频考点。你需要记住每个寄存器的名称、全称和功能。下表总结了 IGCSE 考试中必须掌握的核心寄存器。

Register | 寄存器	Full Name | 全称	Function | 功能
PC	Program Counter | 程序计数器	Holds the address of the next instruction to be fetched | 保存下一条将要取出的指令的地址
MAR	Memory Address Register | 存储地址寄存器	Holds the address of the memory location currently being read from or written to | 保存当前正在读取或写入的存储单元地址
MDR	Memory Data Register | 存储数据寄存器	Holds the actual data or instruction that has just been fetched from or written to memory | 保存刚从存储器取出或即将写入存储器的实际数据或指令
ACC	Accumulator | 累加器	Stores intermediate results of arithmetic and logic operations in the ALU | 存储 ALU 算术和逻辑运算的中间结果
CIR	Current Instruction Register | 当前指令寄存器	Holds the instruction currently being decoded and executed | 保存当前正在解码和执行中的指令

A common exam question asks you to trace how the PC and MAR work together during the fetch cycle: the PC contains the address of the next instruction, this gets copied to the MAR, and then the instruction is retrieved into the MDR.

常见考题会要求你追踪 PC 与 MAR 在取指周期中如何协同工作：PC 保存下一条指令的地址，该地址复制到 MAR，随后指令被取入 MDR。

---

5. The System Bus | 系统总线

The system bus is a set of parallel electrical wires that transmit data and control signals between the CPU, memory, and input/output devices. There are three distinct types of bus in the Von Neumann architecture:

系统总线是连接 CPU、存储器和输入输出设备的一组并行电导线，用于传输数据和控制信号。冯·诺依曼结构中有三种不同类型的总线：

• Address Bus: Carries memory addresses generated by the CPU to memory or I/O devices. It is unidirectional. The wider the address bus, the more memory locations the CPU can address (2ⁿ where n is the number of lines).
• Data Bus: Carries actual data and instructions between components. It is bidirectional. Its width determines how many bits can be transferred at once.
• Control Bus: Carries control signals from the control unit to other components, such as read/write signals and clock pulses. It is bidirectional.

• 地址总线：用于将 CPU 生成的存储地址传输到存储器或 I/O 设备，是单向的。地址总线越宽，CPU 能寻址的存储单元越多（2ⁿ，其中 n 为总线线数）。
• 数据总线：用于在组件之间传输实际数据和指令，是双向的。其宽度决定了一次能传输的位数。
• 控制总线：用于将控制信号从控制单元传送到其他部件，如读/写信号和时钟脉冲，是双向的。

Number of addressable memory locations = 2ⁿ (where n = address bus width)

可寻址存储单元数量 = 2ⁿ（其中 n = 地址总线宽度）

---

6. Input and Output Devices | 输入与输出设备

Input devices send data into the computer system, while output devices present processed information to the user. The CIE syllabus expects you to know a range of devices and be able to match them to appropriate scenarios.

输入设备将数据送入计算机系统，输出设备则将处理后的信息呈现给用户。CIE 考纲要求你认识一系列设备，并能将其匹配到合适的应用场景。

Category | 类别	Examples | 举例
Input | 输入设备	Keyboard, mouse, scanner, microphone, webcam, touchscreen, sensors | 键盘、鼠标、扫描仪、麦克风、网络摄像头、触摸屏、传感器
Output | 输出设备	Monitor, printer, speaker, projector, actuators | 显示器、打印机、扬声器、投影仪、执行器

When answering questions about devices, always consider the context. For example, a barcode scanner is best for fast checkout in a supermarket, while facial recognition cameras would be used for security access control.

回答设备类题目时，务必结合情境。例如，条码扫描器最适合超市快速结账，而人脸识别摄像头则用于安防门禁系统。

---

7. Storage Devices | 存储设备

Storage can be classified into primary storage, secondary storage, and off-line storage. Primary storage (RAM and ROM) is directly accessible by the CPU, while secondary storage (magnetic, optical, solid-state) stores data permanently for future use.

存储可分为主存储、辅助存储和离线存储。主存储（RAM 和 ROM）可被 CPU 直接访问，而辅助存储（磁性、光学、固态）用于长期保存数据以便将来使用。

• RAM (Random Access Memory): Volatile memory that temporarily holds data and instructions currently in use. More RAM improves the system’s ability to run multiple applications smoothly.
• ROM (Read-Only Memory): Non-volatile memory that permanently stores the boot-up (BIOS) instructions. Its contents cannot be easily modified.
• Magnetic storage: Hard disk drives (HDDs) use magnetised platters to store data. They offer high capacity at relatively low cost but have mechanical parts.
• Optical storage: CDs, DVDs, and Blu-ray discs use lasers to read and write data. They are portable and removable.
• Solid-state storage: SSDs use flash memory with no moving parts. They are faster, quieter, and more durable than HDDs, but cost more per gigabyte.

• 随机存取存储器（RAM）：易失性存储器，临时保存正在使用的数据和指令。RAM 越大，系统同时流畅运行多个应用程序的能力越强。
• 只读存储器（ROM）：非易失性存储器，永久保存启动（BIOS）指令，其内容不易修改。
• 磁性存储：硬盘（HDD）利用磁化盘片存储数据，容量大且成本较低，但含有机械部件。
• 光存储：CD、DVD 和蓝光光盘利用激光读写数据，便于携带和移动。
• 固态存储：固态硬盘（SSD）使用闪存，无机械部件，比 HDD 更快、更安静、更耐用，但单位容量成本更高。

---

8. The Clock and CPU Performance | 时钟与 CPU 性能

CPU performance is influenced by three main factors: clock speed, cache size, and the number of cores. The clock generates a signal that synchronises all CPU operations, measured in hertz (Hz).

CPU 性能受三个主要因素影响：时钟速度、高速缓存大小和核心数量。时钟产生一个信号用于同步所有 CPU 操作，以赫兹（Hz）为单位计量。

• Clock speed: Measured in GHz (billions of pulses per second). A higher clock speed means more instructions can be executed per second, increasing performance.
• Cache size: A larger cache allows more frequently used data to be stored closer to the CPU, reducing the need to access slower main memory.
• Number of cores: Each core can process instructions independently. Multiple cores allow parallel processing and better multitasking.

• 时钟速度：以 GHz（每秒数十亿个脉冲）为单位。时钟速度越高，每秒可执行的指令越多，性能越强。
• 缓存大小：缓存越大，越多的常用数据可以靠近 CPU 存放，减少访问较慢的主存储器的次数。
• 核心数量：每个核心可以独立处理指令。多核心允许多任务并行处理，提高运行效率。

When asked to compare two processors, remember to mention all three factors. A processor with a lower clock speed but a much larger cache and more cores may still deliver superior overall performance.

比较两款处理器时，务必兼顾上述三个因素。一款时钟速度较低但缓存更大、核心更多的处理器，其整体性能仍可能更优。

---

9. The Fetch-Decode-Execute Cycle | 取指-译码-执行周期

The fetch-decode-execute cycle is the fundamental process by which the CPU processes an instruction. Understanding each phase is a guaranteed exam topic. The cycle repeats endlessly while the computer is powered on.

取指-译码-执行周期是 CPU 处理指令的基本过程。理解每个阶段几乎是必考内容。在计算机开机期间，这个循环会不断地重复执行。

Phase 1: Fetch | 第一阶段：取指

The address of the next instruction is copied from the PC to the MAR. The instruction at that address is then transferred along the data bus to the MDR. The PC is incremented to point to the next instruction.

程序计数器（PC）中的下一条指令地址被复制到存储地址寄存器（MAR）。该地址处的指令沿数据总线传输到存储数据寄存器（MDR）。随后 PC 加 1，指向下一条指令。

Phase 2: Decode | 第二阶段：译码

The instruction held in the MDR is moved to the CIR, where the control unit interprets what action needs to be performed.

MDR 中的指令被移动到当前指令寄存器（CIR），控制单元在这里解释需要执行什么操作。

Phase 3: Execute | 第三阶段：执行

The control unit sends control signals to the appropriate components. The ALU carries out arithmetic or logic operations, results are stored in the accumulator, and data can be written back to memory.

控制单元向相应的组件发送控制信号。ALU 执行算术或逻辑运算，结果存入累加器，数据也可以写回存储器。

PC → MAR → MDR → CIR → Execute → Repeat

PC → MAR → MDR → CIR → 执行 → 重复

---

10. Common Exam Questions and Tips | 常见考题与答题技巧

Here are some typical question styles and how to approach them confidently:

以下是一些典型题型以及如何从容应对的方法：

• Describe the function of the ALU: State that it performs arithmetic ( +, −, ×, ÷ ) and logical operations (AND, OR, NOT, comparisons like greater than or equal to). One mark is usually awarded for each correct operation type.
• Explain the difference between RAM and ROM: RAM is volatile and can be written to; ROM is non-volatile and mainly read-only. Use the words ‘volatile’ and ‘non-volatile’ to guarantee marks.
• State what the address bus does: It carries addresses from the CPU to memory. Do not say it carries data — that is the data bus.
• Calculate addressable memory: If an address bus has 16 lines, the CPU can address 2¹⁶ = 65,536 memory locations. Always show the working.
• Suggest why a device is used: Give a reason linked to the scenario, not just the device’s general features.

• 描述 ALU 的功能：说明它执行算术运算（ +、−、×、÷ ）和逻辑运算（与、或、非、大于等于等比较运算）。通常写对一类运算得一分。
• 解释 RAM 和 ROM 的区别：RAM 易失且可写入；ROM 非易失且主要只读。务必写出 “易失”（volatile）和 “非易失”（non-volatile）这两个关键词以获得高分。
• 说明地址总线的作用：它负责将地址从 CPU 传送到存储器。不要写成传输数据——那是数据总线的工作。
• 计算可寻址容量：若地址总线为 16 根线，CPU 可寻址 2¹⁶ = 65,536 个存储单元。一定要写出计算过程。
• 分析设备选择原因：要结合场景给出理由，而不是只罗列设备的通用特性。

---

Mastering computer architecture is all about understanding the relationships between components and being precise with terminology. Practise tracing the fetch-decode-execute cycle repeatedly, memorise the function of each register, and get comfortable with bus direction and width calculations. These fundamental concepts form the foundation upon which more advanced topics in the IGCSE syllabus are built.

掌握计算机体系结构的关键在于理解各组件之间的关系，并准确使用术语。反复练习追踪取指-译码-执行周期，牢记每个寄存器的功能，并熟练把握总线的方向和宽度计算。这些基础概念构成 IGCSE 考纲中更深层次主题的坚实根基。

Published by TutorHao | Computer Science Revision Series | aleveler.com

更多咨询请联系16621398022（同微信）